Input buffer circuit and logic circuit using the buffer circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307467, 3072992, H03K 19086

Patent

active

047257440

ABSTRACT:
A logic circuit including an input transistor receiving the input signal at its emitter, an output transistor in emitter-follower configuration receiving the signal from the collector of the input transistor, a voltage dividing resistor pair connected to the collector of the input transistor, and a feedback circuit conducting the signal produced by the voltage dividing resistor pair back to the base of the input transistor, the output signal being produced at the emitter of the output transistor.

REFERENCES:
patent: 3719830 (1973-03-01), Ananiades
patent: 3921007 (1975-11-01), Lacher
patent: 4329597 (1982-04-01), Yamagiwa

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