Input buffer circuit

Details Input buffer circuit Input buffer circuit

1981-10-22

1983-09-27

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307568, H03K 19094, H03K 19092, H03K 19017

Patent

active

044069570

ABSTRACT:
A first insulated-gate field-effect transistor (IGFET) having its conduction path connected between a first power terminal and an output terminal and a second IGFET of complementary conductivity to said first IGFET connected between the output terminal and a second power terminal. A selectively enabled level shift means coupled between the gate electrodes of the first and second IGFETs functions to substantially reduce the turn-on potential across the first transistor and to drive it off or to a high impedance state when a turn-on signal is applied to the second IGFET. The second IGFET can then easily and quickly drive the output to the voltage at the second power terminal. In response to an input turn-on signal for the first IGFET, it is pulsed on momentarily and the output is then clamped to the potential at the first power terminal.

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