Input and output buffering

Details Input and output buffering Input and output buffering

2004-06-08

2008-10-14

Vu, Huy D. (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S351000, C370S360000, C370S412000, C370S429000, C370S462000, C710S001000, C710S036000, C710S038000

Reexamination Certificate

active

07436845

ABSTRACT:
An Infiniband device is provided. The device has a plurality of input/output ports. Each port has associated therewith an input buffer for storage of a packet received at that port. Each port also has associated therewith a plurality of output buffers for storage of a packet transmitted from an input buffer via a switching matrix. Each port is arranged to share its associated plurality of output ports with at least one other port. Each input buffer is also associated with a single output buffer of each shared plurality of output buffers. A packet received at an input buffer is transmitted to all associated output buffers via the switching matrix in parallel with an output buffer select signal. The output buffer select signal is sent to less than all of the associated output buffers, any output buffer not receiving the output buffer select signal is configured to discard the packet transmitted from the input buffer.

REFERENCES:
patent: 6920106 (2005-07-01), Chou et al.
patent: 7180862 (2007-02-01), Peebles et al.
patent: 2004/0081394 (2004-04-01), Biran et al.
patent: 2004/0252685 (2004-12-01), Kagan et al.

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