Initialization system for a close-coupled multiprocessor system

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395650, 364DIG2, G06F 1560

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054189551

ABSTRACT:
In an initialization system for a close-coupled multiprocessor system. The initialization system includes a plurality of processors and one main memory connected to the processors through a system bus, and the initialization system connected to the processors through the system bus. The initialization system includes a first storage for storing identification (ID) codes each corresponding to the processor, one of ID codes being designated as a master processor, and other ID codes having a priority for designating the next master processor and a second storage for storing a first program to initialize the system and a second program to supervise an initialization time. In addition, the initialization system includes a first information unit for informing of the start of operation of the processors and a second information unit for informing of the completion of initialization of the master processor.

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patent: 5041966 (1991-08-01), Nakai et al.
Triebel & Singh The 8086 Microprocessor Prentice-Hall, 1985, p. 9.

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