Inhibitable counter stage and counter

Details Inhibitable counter stage and counter Inhibitable counter stage and counter

1977-09-12

1980-01-08

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307200B, 307220C, 307279, 307289, 328 48, 328 99, H03K 2308, H03K 2132, H03K 2136, H03K 3353

Patent

active

041829611

ABSTRACT:
A counter stage having a master section coupled to a slave section in which the transfer of signals between the master and the slave is selectively inhibited. In one embodiment of the invention, an inhibit transmission gate is logically "ANDED" with a clocked transmission gate between the master and slave sections of a counter stage. When the inhibit transmission gate is enabled, the counter stage operates normally. When the inhibit transmission gate is disabled, the states of the master and slave sections cannot change and the count in the stage does not advance. In this and other embodiments, clocking signals are continuously applied to the master-slave sections of a counting stage while transfer of data between the two sections is selectively inhibited. In still other embodiments, the clocking signals to a master-slave counter stage are selectively inhibited to prevent change in the stage.

REFERENCES:
patent: 3657557 (1972-04-01), Smith et al.
patent: 3823551 (1974-07-01), Riehl
patent: 3833822 (1974-09-01), Carbrey
patent: 3930169 (1975-12-01), Kuhn, Jr.
patent: 4002933 (1977-01-01), Leuschner
patent: 4114049 (1978-09-01), Suzuki
Suzuki, 1973--IEEE-ISSCC, Digest of Technical Papers, pp. 58-59; 2/14/73.

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