Information transfer equipment

Details Information transfer equipment Information transfer equipment

1998-10-29

2002-01-15

Vincent, David R. (Department: 2732)

Multiplex communications

Communication techniques for information carried in plural...

Assembly or disassembly of messages having address headers

C370S458000

Reexamination Certificate

active

06339600

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an information transfer equipment, and in particular to an information transfer equipment which executes a monitoring control of each of channel portions by transmitting/receiving plural kinds of monitoring control information between the channel portions and a common portion.
In recent years, a communication system has aimed at a high transmission capacity and an enhanced monitoring control function regardless of its kind, resulting in an enlarged hardware scale. In a system accomplishing the monitoring control function, it is important that an information transfer equipment works efficiently on the aspects of function and cost.
2. Description of the Related Art
Generally, an information transfer equipment mounts thereon a microprocessor (CPU) and performs its main function with firmware/software. In particular, a function block which manages a monitoring control has achieved a speedup and a high-performance in the form of multi-CPU.
Also, such an information transfer equipment enlarged in its hardware scale as mentioned above is generally composed of a plurality of racks. Accordingly, the monitoring control apparatus must execute the monitoring control to all of the racks.
FIG. 7
shows an arrangement of a conventional information transfer equipment in the monitoring control apparatus of a communication system adapted to SDH (Synchronous Digital Hierarchy). The conventional information transfer equipment comprises channel portions (═CH portions)
50
_
1
,
50
_
2
,
50
_
3
, . . . (hereinafter sometimes generally referred to as “50”) which are transmission system processors and a common portion
10
which is connected to each of the channel portions
50
_
1
,
50
_
2
,
50
_
3
, . . . . The common portion
10
comprises a main CPU, an Engineering order wire (hereafter abbreviated as EOW) processor (processing unit), a user channel (hereinafter abbreviated as Uch) processor, a DCC (Data Communication Channel: hereinafter abbreviated as DCC) processor, a system clock source (hereinafter abbreviated as TCU) processor, and a Radio Protection switchover (hereinafter abbreviated as RPS) processor.
Between each of the channel portions
50
and the main CPU, the EOW processor, the Uch processor, the DCC processor, the TCU processor, and the RPS processor, a bus access related signal, an EOW related signal, a Uch related signal, a DCC related signal, a TCU related signal, and an RPS related signal which all form monitoring control information are transferred.
Namely, the common portion
10
and each of the channel portions
50
have processors which execute processes corresponding to the types of the above-mentioned signals. The processors transmit and receive those signals through physically different transmission/reception lines
110
,
111
prepared for each signal type.
In operation, each of the channel portions
50
executes a terminal process of a main signal transmission line per channel, and transmits the monitoring control information to the common portion
10
through the reception line
111
. The common portion
10
sends the monitoring control information and a control signal to the channel portions
50
through the transmission line
110
.
In the common portion
10
, the main CPU executes a write and a read access to each of the channel portions
50
with an address signal, a data signal, a memory read signal, a memory write signal and the like which are bus access related signals for the monitoring control to the channel portions
50
.
The EOW processor, the Uch processor, and the DCC processor transmit/receive E
1
and E
2
byte signals for voice consultation or F
1
byte signal an operator of the network uses, and D
1
-D
12
byte signals by which the monitoring control information is transferred, respectively defined by an overhead of STM (Synchronous Transport Module) signal of the SDH, to/from each of the channel portions
50
, and process them. The TCU processor transmits/receives clock quality information of the common portion
10
and the channel portion
50
to/from each of the channel portions
50
. The RPS processor transmits/receives a switchover signal, an RPS initiator notification and the like which are wireless related control information peculiar to a multiplex wireless apparatus to/from each of the channel portions
50
.
In such a conventional information transfer equipment, the number of an interface cable which connects the common portion to each of the channel portions increases in proportion to the number of the channel portions and the signal type. Also, in the common portion, it has been necessary to normally prepare interface access points corresponding to the largest number of the channel portion which can be connected, so that the following points have been main causes of increased cost of the equipment:
{circle around (1)} The cable cost is high;
{circle around (2)} The connector cost is high;
{circle around (3)} It is necessary to detect each cable disconnection or to generate an equivalent alarm, so that alarm items of a circuit fault increase and press the monitoring control process;
{circle around (4)} A burden of an installation and a local adjustment of the equipment increases;
{circle around (5)} Since a transmission between racks is required and it is inevitable to use an input/output device for an interface signal, the number of the devices and electric power consumption increase, leading to an increase in cost.
SUMMARY OF THE INVENTION
It is accordingly an object of the present invention to provide an information transfer equipment which executes a monitoring control of each of channel portions by transmitting/receiving plural kinds of monitoring control information between the channel portions and a common portion in which the monitoring control information is transferred without any increase in cost and burden of a monitoring control process of the equipment.
[1] To achieve the above-mentioned object, in the information transfer equipment according to the present invention, as shown by a schematic arrangement in
FIG. 1
, a multiplexer of a common portion
10
multiplexes and transmits, by broadcasting, monitoring control information
90
into a predetermined position of a Time Division Multiplexing (hereinafter abbreviated as TDM) frame. A demultiplexer of each of channel portions
50
_
1
-
50
_
8
receives the TDM frame and demultiplexes therefrom the monitoring control information
90
.
Also, the multiplexer of the channel portions
50
multiplexes and transmits each of the monitoring control information
90
_
1
-
90
_
8
(hereinafter generally referred to as “90”) into a Time Division Multiple Access (hereinafter abbreviated as TDMA) frame based on a channel number preset for its own. A demultiplexer of the common portion
10
receives the TDMA frame and demultiplexes therefrom the monitoring control information
90
.
Namely, the common portion
10
executes the TDM-multiplexing of plural kinds of the monitoring control information
90
on a transmission line
110
of one system and broadcasts it to the channel portions
50
. Each of the channel portions
50
executes the TDMA-multiplexing of the monitoring control information
90
of its own on the reception line
111
of one system and transmits it to the common portion
10
.
As a result, it becomes possible to connect the common portion
10
to the channel portions
50
with the information transfer equipment in which an interface is integrated to one system.
[2] In the above-mentioned invention [1], the multiplexer of each of the channel portions
50
may transmit a transmission timing of the TDMA frame
114
in synchronization with a timing of the TDM frame
112
.
As a result, it becomes possible to easily synchronize transmission/reception timings of the multiplexers and the demultiplexers in the common portion
10
and each of the channel portions
50
.
[3] In the above-mentioned invention [1], processors of the common portion
10

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