Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
1998-04-13
2001-11-13
Chin, Stephen (Department: 2634)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C375S262000, C375S376000, C714S795000
Reexamination Certificate
active
06317471
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an information reproducing apparatus applicable to a reproducing apparatus that performs a Viterbi decoding process and a reproducing method thereof, in particular, to a detection of a phase error of a PLL.
2. Description of the Related Art
In a digital signal reproducing apparatus, a PLL (Phase Locked Loop) is used to generate a clock signal that synchronizes with a reproduced digital signal. Conventionally, an edge of a reproduced signal is detected. With phase information of the edge, a phase error is detected. With the detected phase error, the frequency of a VCO (Voltage Controlled Oscillator) or a VFO (Variable Frequency Oscillator) is controlled. Thus, the PLL generates a clock signal that synchronizes with the reproduced signal.
However, when a reproduced signal includes noise of ½ T or larger, since the noise tends to fold back, the PLL may get disordered and thereby a malfunction such as a bit slip may take place.
OBJECTS AND SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide an information reproducing apparatus that adequately controls the PLL corresponding to a phase error detected by Viterbi decoding process and a reproducing method thereof.
A first aspect of the present invention is an information reproducing apparatus for decoding a signal reproduced from a record medium corresponding to Viterbi decoding method, comprising a status data generating means for generating status data that represents the maximum likelihood status transition with a reproduced signal value sampled corresponding to a clock signal, a decoded data outputting means for outputting decoded data with the status data, a detection timing generating means for generating a detection timing of a phase error signal corresponding to a leading edge or a trailing edge of a reproduced signal with the status data, a phase error signal generating means for calculating the reproduced signal value at the detection timing so as to generate a phase error signal, and a PLL (Phase Locked Loop) for receiving the phase error signal as a control signal and generating the clock signal.
A second aspect of the present invention is an information reproducing method for decoding a signal reproduced from a record medium corresponding to Viterbi decoding method, comprising the steps of generating status data that represents the maximum likelihood status transition with a reproduced signal value sampled corresponding to a clock signal, generating decoded data with the status data, generating a detection timing of a phase error signal corresponding to a leading edge or a trailing edge of a reproduced signal with the status data, calculating the reproduced signal value at the detection timing so as to generate a phase error signal, and supplying the phase error signal as a control signal to a PLL (Phase Locked Loop) that generates the clock signal.
A third aspect of the present invention is an information reproducing apparatus for decoding a signal reproduced from a record medium corresponding to Viterbi decoding method, comprising a branch metric calculating means for calculating branch metrics for available statuses at particular time point with a reproduced signal that is input, a path metric updating means for selecting the maximum likelihood path metric in each status with added values of the branch metrics and preceding path metrics, outputting a first selection signal corresponding to the selected result, and outputting a second selection signal with the minimum value of the path metrics, a status data generating means, having a plurality of status memories corresponding to the individual statuses, for updating status data that represents each status with the first selection signal corresponding to a clock signal in each status memory, a status data selecting means for outputting the most adequate status data from the status data stored in the status memories with the second selection signal, a data decoding means for outputting decoded data with the selected status data and the preceding status data, a phase error signal generating means for detecting a phase error of the reproduced signal corresponding to the status data received from the status data generating means, and a clock signal generating means for generating the clock signal with the phase error signal.
The Viterbi decoder can generate status data that represents the maximum likelihood status transition to be selected. Corresponding to the status data, the detection timing of a phase error can be obtained. Corresponding to the detection timing of the phase error, a phase error can be detected.
These and other objects, features and advantages of the present invention will become more apparent in light of the following detailed description of a best mode embodiment thereof, as illustrated in the accompanying drawings.
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U.S. Pat. application No. 09/057,796, filed Apr. 9, 1998.
Chiba Takayoshi
Horigome Junichi
Yamaguchi Shigeo
Chin Stephen
Fan Chieh M.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Sony Corporation
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