Information recording/regenerating circuit for a memory unit

Details Information recording/regenerating circuit for a memory unit Information recording/regenerating circuit for a memory unit

1986-11-05

1989-03-07

Faber, Alan

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Data clocking

360 39, 360 53, G11B 509, G11B 2010

Patent

active

048111252

ABSTRACT:
A memory unit adapted for use with an electronic computer or the like. In the unit, a data-clock pulse train regenerated by a head is discriminated into a data pulse train and a clock pulse train by a first discrimination circuit in accordance with a first gate signal outputted from a first gate circuit, and any error in each of such discriminated pulse trains is detected by a first regeneration error detection circuit. Meanwhile, the data-clock pulse train is discriminated into a data pulse train and a clock pulse train by a second discrimination circuit in accordance with a second gate signal which is outputted from a second gate circuit in accordance with the regenerated data-clock pulse train and is different in waveform from the first gate signal, and any error in such discriminated pulse trains is detected by a second regeneration error detection circuit, so that any regeneration error in the data-clock pulse train can be detected with a higher precision.

REFERENCES:
patent: 4394695 (1983-07-01), Mahon
patent: 4590531 (1986-05-01), Platte et al.
patent: 4594703 (1986-06-01), Tomisawa et al.
patent: 4625321 (1986-11-01), Pechar et al.
patent: 4638472 (1987-01-01), Ogata et al.
patent: 4672597 (1987-06-01), Yamazaki

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