Motion video signal processing for recording or reproducing – Local trick play processing – With randomly accessible medium
Reexamination Certificate
1999-08-27
2004-02-17
Chevalier, Robert (Department: 2615)
Motion video signal processing for recording or reproducing
Local trick play processing
With randomly accessible medium
C386S349000, C386S349000
Reexamination Certificate
active
06694092
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to an information recording apparatus and method, an information reproduction method and apparatus, and an information recording medium suitable for use where various data are recorded onto a recording medium such as a magnetic tape or a magnetic disk as a storage device for a computer.
Conventional information reproduction apparatus such as a hard disk apparatus cannot eliminate appearance of an error at a fixed rate in data reproduced from a recording medium. Therefore, an apparatus of the type mentioned sets a sector length which is a unit of recording and reproduction and an error correction code length in accordance with a characteristic of data.
Since a computer frequently processes a file of a comparatively small size and is required to quickly access various files recorded discretely on a recording medium, it is required to have a high random access performance (hereinafter referred to as random access capability).
Therefore, a magnetic disk apparatus used as a storage device for a computer divides data to be used for recording and/or reproduction into blocks each including a short unit of data and processes the data for the individual blocks (or in other words, sectors of a reduced sector length) to assure a high random access capability. Further, when necessary, the magnetic disk apparatus repeats a retrying operation to compensate for the error correction capability which is deteriorated by the reduction of the sector length so that data can be reproduced with a high degree of reliability.
On the other hand, audio data and/or video data (hereinafter referred to as AV data) are recorded in a comparatively large continuous file on a recording medium, and it is required that the continuous data be reproduced on the real time basis.
Therefore, a data storage apparatus for a video apparatus such as a digital video tape recorder handles data of a comparatively large sector length to effectively prevent an increase in redundancy and strengthen the error correction capability so that data can be successively reproduced with a high degree of reliability.
FIG. 3
shows a magnetic disk apparatus used as a storage apparatus for a computer and employing a hard disk. Referring to
FIG. 3
, the magnetic disk apparatus
1
shown includes a recording and reproduction circuit
2
which is controlled by a controller
3
and converts, upon recording, data trains outputted from the controller
3
into a serial data train to produce a magnetic head driving signal REC to be used for driving a magnetic head not shown. Upon reproduction, the recording and reproduction circuit
2
processes a reproduction signal PB outputted from the magnetic head to reproduce data recorded on the hard disk and outputs the reproduced data to the controller
3
. In the operation of the magnetic disk apparatus
1
described, an error appears at a fixed rate in the data.
A central processing unit (CPU)
4
receives a control command transmitted from a host computer not shown through the controller
3
and controls operation of the controller
3
in accordance with the control command. The central processing unit
4
thus controls operation of the entire magnetic disk apparatus
1
so that a file of the data train outputted from the host computer may be recorded onto the hard disk and conversely a file designated from the host computer may be reproduced from the hard disk.
In the control, the central processing unit
4
confirms a free area of the hard disk and other necessary information from management data recorded in the innermost circumferential record area of the hard disk to control a sequence of operations, and, when necessary, transmits status data corresponding to the control command to the host computer through the controller
3
.
A random access memory (RAM)
5
temporarily stores data outputted from the controller
3
and outputs the data to the controller
3
to buffer data D
1
to be inputted to or outputted from the host computer through the controller
3
.
The controller
3
receives the data D
1
outputted from the host computer and transmits data of a control command included in the data D
1
to the central processing unit
4
. The controller
3
converts those data included in the data D
1
which should be recorded into data of a format suitable for recording onto the hard disk and outputs the resulting data to the recording and reproduction circuit
2
under the control of the central processing unit
4
.
Further, the controller
3
transmits, from data inputted thereto from the recording and reproduction circuit
2
, management data which have been reproduced from the innermost circumferential record area of the hard disk, to the central processing unit
4
so that the central processing unit
4
can access the hard disk in accordance with the management data. The controller
3
processes, from the data inputted thereto from the recording and reproduction circuit
2
in this manner, data of a file designated by the central processing unit
4
reversely to that in the processing performed upon recording and outputs resulting data to the host computer.
Further, the controller
3
outputs status data outputted from the central processing unit
4
to the host computer and outputs management data to the recording and reproduction circuit
2
. The controller
3
thus accesses a desired sector of the hard disk and records management data necessary for the accessing to the innermost circumferential record area of the hard disk.
In the processes described above, the controller
3
converts recording data inputted thereto from the host computer into blocks, for example, in a unit of 512 bytes and adds an error correction code of 21 bytes to each block. The controller
3
executes recording and/or reproduction processing in a unit of a block of 512+21 bytes produced in this manner.
More particularly, in the controller
3
, a host interface
7
forms an input/output interface with the host computer, and receives data D
1
to be recorded from the host computer and outputs the data D
1
to a bus controller
8
. Conversely, the host interface
7
outputs data D
1
reproduced from the hard disk and outputted from the bus controller
8
to the host computer. Further, the host interface
7
outputs a control command inputted thereto from the host computer to the central processing unit
4
, but outputs status data outputted from the central processing unit
4
to the host computer.
The bus controller
8
receives data D
1
to be recorded from the host interface
7
and temporarily stores the data D
1
into the random access memory
5
. The bus controller
8
reads out the data D
1
stored in the random access memory
5
in this manner in a unit of 512 bytes and outputs the data D
1
to a C
1
code processing circuit
9
under the control of a sequencer
10
.
The bus controller
8
conversely receives, upon reproduction, data D
1
reproduced in a unit of 512 bytes from the C
1
code processing circuit
9
under the control of the sequencer
10
and temporarily stores the data D
1
into the random access memory
5
. The bus controller
8
reads out the data D
1
temporarily stored in the random access memory
5
in response to processing of the host interface
7
and outputs the data D
1
to the host interface
7
. If a retry mode is set by the sequencer
10
, then the bus controller
8
updates the data stored in the random access memory
5
with the data D
1
outputted from the C
1
code processing circuit
9
. Consequently, the data D
1
stored in the random access memory
5
are updated with the data D
1
reproduced correctly by the retrying operation, and the correct data D
1
are outputted. Further, the bus controller
8
processes management data to be outputted to or inputted from the central processing unit
4
similarly to the data to be outputted to or inputted from the host interface
7
.
The C
1
code processing circuit
9
produces, upon recording, an error correction code (C
1
code) of 21 bytes for the data D
1
outputted in a unit of 512
Chevalier Robert
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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