Boots – shoes – and leggings
Patent
1989-04-07
1992-06-30
Popek, Joseph A.
Boots, shoes, and leggings
364DIG1, I20G 1206
Patent
active
051270960
ABSTRACT:
An information processing apparatus includes a program memory (4, 40) and circuitry for switching mapping schemes so as to deal with both direct and bank mapping schemes without alteration of programs. The program memory (4) includes a first memory area (14, 15) formed of a plurality of memory blocks for storing a first program (100) for the bank mapping and a second memory area (16, 17) utilized as a memory block for storing a second program for direct mapping. In the bank mapping, each memory block is mapped into a same address area of an address space of the processor. In the direct mapping, the first and second memory areas are mapped in one-to-one correspondence into the address space. Alternative program memory (40) includes a first memory block (50) storing a first program and a second memory block (60) storing a second program. A predetermined identification information ("JA") is stored in a predetermined memory location of the second memory block. The execution of a program from one subroutine to another is performed using direct or bank mapping by determining whether the predetermined identification information is stored at an address in the address space which corresponds to the predetermined memory location.
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Aoki Noriyuki
Araki Chiaki
Kaneko Yutaka
Maehara Hideyuki
Ohama Tatsuyuki
Elmore Reba I.
Popek Joseph A.
Sanyo Electric Co,. Ltd.
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