Electrical computers and digital processing systems: processing – Instruction issuing
Patent
1998-03-18
2000-10-31
Eng, David Y.
Electrical computers and digital processing systems: processing
Instruction issuing
G06F 930
Patent
active
061417467
ABSTRACT:
An information processor having a control unit in which a plurality of instructions to simultaneously be executed are decoded by a decoder section, an executing unit to be dispatched of a plurality of executing units is selected by an index selecting section according to a result of the decoding, and dispatch to any of the plurality of executing units is inhibited by a dispatch inhibiting section according to a result of the decoding by the decoder section as well as to a result of the selection by the index selecting section.
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patent: 5630157 (1997-05-01), Dwyer
patent: 5689674 (1997-11-01), Griffith et al.
patent: 5699537 (1997-12-01), Sharangpani et al.
Asakawa Takeo
Kawano Hiroshi
Eng David Y.
Fujitsu Limited
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