Information processing system having power saving control of the

Details Information processing system having power saving control of the Information processing system having power saving control of the

1992-02-24

1993-02-23

Miska, Vit W.

Horology: time measuring systems or devices

Combined with disparate device

364707, 364DIG1, G06F 104, G04B 4700

Patent

active

051896478

ABSTRACT:
An information processing system operates under a multi-tasking operating system in which each task to be run is assigned a priority level. A Clock Switch (41) is positioned between the Clock Oscillator (50) and the Processor (10). A System Timer (70) establishes periodic intervals of time. At the beginning of each time interval, the System Timer, via an Interrupt Controller (60) and Transition Detector (42), turns ON (if its not already ON) the clock to the Processor by sending a Clock Start Signal to the Clock Switch. A Clock Control Program is assigned the lowest priority such that the Clock Control Program runs if and only if there are no other tasks running. When the Clock Control Program runs, it sends a code to a Register (43), which in turn sends a Clock Stop signal to the Clock Switch, thereby stopping the clock to the Processor. As described above, the System Timer will restart the clock again at the beginning of the next time interval. By stopping the clock to the Processor, the power to and the heat dissipated by the Processor are reduced. In an alternate embodiment, the frequency of the clock signal to the processor is reduced, rather than completely stopping the clock to the Processor.

REFERENCES:
patent: 4757505 (1988-07-01), Marrington et al.
patent: 4758945 (1988-07-01), Remedi
patent: 4780843 (1988-10-01), Tietsen
patent: 4851987 (1989-07-01), Day

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