Information processing system having decode, write and read mean

Details Information processing system having decode, write and read mean Information processing system having decode, write and read mean

1987-01-12

1989-02-28

Heckler, Thomas M.

Boots, shoes, and leggings

340804, G06F 3153

Patent

active

048092150

ABSTRACT:
In an information processing system for efficiently allocating a writing of a decoded pixel signal into a display memory to a period other than the period during which a read circuit accesses the display memory for reading out information to a display device for a display, the read circuit indicates to a decode/write circuit producing the decoded pixel signal a period during which the read circuit does not access the display memory, and the decode/write circuit writes the decoded pixel signal into the display memory at a timing at which the display memory is not accessed by the read circuit.

REFERENCES:
patent: 4069511 (1978-01-01), Lelke
patent: 4070710 (1978-01-01), Sukonick et al.
patent: 4110794 (1978-08-01), Lester et al.
patent: 4378594 (1983-03-01), Kenyon
patent: 4561025 (1985-12-01), Tsuzuki
Nakamura et al., "High Speed Encoding and Decoding Processor for Group 4 Facsimile Apparatus", 1984, IEEE, pp. 219-222.

Affiliated with

Also associated with

Rating

Information processing system having decode, write and read mean does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Information processing system having decode, write and read mean, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Information processing system having decode, write and read mean will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1373929