Information processing system having an address translation tabl

Details Information processing system having an address translation tabl Information processing system having an address translation tabl

1993-02-22

1996-01-02

Whitefield, Michael A.

Boots, shoes, and leggings

395419, 364DIG1, G06F 1210

Patent

active

054816882

ABSTRACT:
An information processing system has a main memory unit, an expanded memory unit, and an instruction processing unit producing a virtual address. An address translation table, namely, a page table stores page table words which include main/expanded memory presence bits indicating to which memory unit of the main memory unit and the expanded memory unit real pages are stored. Preferably, the instruction processing unit may include an access type determiner for determining an access type for at least one operand. The access type indicates which memory unit is the optimum one for the operand. Instead of the access type determiner, the instruction processing unit may include segment descriptor registers for storing segment descriptors having expanded memory bits indicating which memory units are the optimum ones for the segments. In place of the access type determiner, the instruction processing unit may include virtual space registers for indicating virtual space numbers identifying a plurality of virtual spaces and an access type determining circuit for determining which memory unit is the optimum one for a designated virtual space.

REFERENCES:
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patent: 4669043 (1987-05-01), Kaplinsky
patent: 5129070 (1992-07-01), Dorotte
patent: 5182799 (1993-01-01), Tamura et al.
patent: 5233700 (1993-08-01), Takagi
patent: 5237668 (1993-08-01), Blandy et al.
patent: 5347636 (1994-09-01), Ooi et al.
Enterprise System Architecture/390 Principles of Operation Publication No. IBM SA 22-7201-0, Oct. 1990, pp. 7-39 to 7-41.

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