Information processing system capable of updating a BIOS program

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395652, G06F 945

Patent

active

058357610

ABSTRACT:
There is provided with an information processing system capable of updating a basic input/output system (BIOS) programme without interrupting or stopping the operation of the system.
The information processing system (41) comprises an update programme memory (48) and a BIOS update flag (50). The update programme memory (48) retains the contents stored therein after the electrical power to the information processing system (41) has been turned off. An update programme input arrangement supplies an update basic input/output system programme to the update programme memory (48) to write the programme thereinto while the operating system is in operation. The update programme input arrangement then sets the BIOS update flag (50). A system loading arrangement copies the update basic input/output system programme stored in the update programme memory (48) to a memory area of a main memory (44) when the BIOS update flag (50) is set upon loading the operating system (i.e., when the information processing system is turned on or is reset).

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Dipert et al., "Designing an updatable BIOS using flash memory," Microprocessors and Microsystems, vol. 16, No. 8, pp. 427-446, 1992.
Jex, Jerry, "Flash Memory BIOS for PC and Notebook Computers," IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, vol. 2 of 2, pp. 692-695, May 10, 1991.
IBM Technical Disclosure Bulletin "Halt/Reset Option in Non-Maskable Interrupt Handler", Sep. 1991.
IBM Technical Disclosure Bulletin "Update Mechanism For Personal Computer System Resident Firmware" Mar. 1992.
B. Dipert & D. Verner "Designing an updatable BIOS using Flash Memory" Microprocessors & Microsystems, Oct. 1992.
J. Shandle "Laptop Vendodrs Join the Flash Bandwagon" Electronics Nov., 1990.

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