Boots – shoes – and leggings
Patent
1992-11-13
1995-04-04
Lall, Parshotam S.
Boots, shoes, and leggings
364239, 3642463, 3642543, 364259, 3642613, G06F 900
Patent
active
054044707
ABSTRACT:
An information processing apparatus comprising a register file 5 for containing a plurality of data storing registers, a data holding unit 2 including a plurality of data holding entry blocks, a temporary instruction holding unit 1 having a plurality of instruction holding entry blocks for temporarily holding instructions, execution units 6, 7 for executing transactions designated by instructions and outputting result data by use of data read out from the register file 5 or the data holding unit 2, and an instruction selecting unit 3 for selecting an instruction executable among instructions held in the instruction holding unit 1. The data holding entry block (DB0.about.DB5) includes a data field 23 storing the result data outputted from the execution units 6, 7, a destination register field 21 storing destination register numbers, a dependency detector 24, a dependency information field 22, and a data storing bit 27 that shows a storing state of data in the data field 23, and the dependency detector 24 is connected to the destination register field 21 so as to compare a source register number of any succeeding instruction with a destination register number stored in the destination register field 21 to check data dependency therebetween and output a data dependency information. The dependency information field 22 holds the data dependency information and outputs an instruction executable signal 31 based on the data dependency information and the data storing bit 27. And the instruction selecting unit 3 responds to the instruction executable signal 31 to select the executable instruction among instructions stored in the temporary instruction holding means 1.
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H. Dwyer et al. "A Fast Instruction Dispatch Unit for Multiple and Out-of-Sequence Issuances".
"An Efficient Algorithm for exploiting multiple Arithmetic Units" by R. M. Tomasulo; IBM Journal, Jan. 1967; pp. 25-33.
"Implementation of Precise Interrupts in Piplined Processors" by James E. Smith; 1985 IEEE; pp., 36-44.
Lall Parshotam S.
Matsushita Electric - Industrial Co., Ltd.
Mohamed Ayni
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