Information processing apparatus capable of executing exception

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Details

364DIG1, 364230, 3642301, 3642302, G06F 946

Patent

active

053903056

ABSTRACT:
In a microprocessor, an exception instruction such as an interrupt demand is executable at high speed. The microprocessor comprises a normal-instruction executing unit for controlling execution of a normal instruction used for the information processing apparatus; an exception executing unit independently operable from the normal instruction executing unit, for controlling a transition process operation to an exception used in the information processing apparatus; and, an exception initiating unit for initiating the transition process operation of the exception unit by immediately recognizing an issuance of an exception demand, whereby upon issuance of the exception demand, the transition process operation to the exception is independently executable by the exception executing unit while the normal instruction is executed by the normal-instruction execution unit.

REFERENCES:
patent: 4956767 (1990-09-01), Stephenson
patent: 5193187 (1993-03-01), Strout, II et al.

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