1994-08-18
1995-08-08
Beausoliel, Jr., Robert W.
39518206, 39518208, G06F 1134
Patent
active
054407281
ABSTRACT:
An information processing apparatus includes a plurality of processors, a memory unit, a plurality of address conversion tables, an address conversion table managing unit, an address conversion table control unit, a processor managing unit, and an abnormality processing unit. The processors perform arithmetic operations for information processing. The memory unit is accessed commonly by the processors. The address conversion tables convert a logic address into a physical address. The address conversion table managing unit has directories for managing the address conversion tables in accordance with contents of the logic address and Nos. of processors accessible to the address conversion tables. The address conversion table control unit updates the address conversion table managing unit to update contents of the address conversion tables. The processor managing unit checks whether each processor is operable. The abnormality processing unit performs processing for deleting a specific processor No. from a directory of the address conversion table managing unit in accordance with abnormality information from the processors.
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Beausoliel, Jr. Robert W.
NEC Corporation
Tu Trinh
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