1997-02-13
1998-11-17
Teska, Kevin J.
395580, G06F 9455
Patent
active
058389539
ABSTRACT:
The present invention has the following arrangement. That is, an instruction stream for performing an instruction simulation is analyzed before the instruction simulation is started to predict a timing at which interruption occurs, an interrupt generating unit generates a predictive interrupt signal one instruction cycle before interruption occurs on the basis of the prediction result, and, when an instruction which is executed immediately after the predictive interrupt signal is generated has a flag-less instruction identifier, an execution process of the instruction which is executed immediately after the predictive interrupt signal is generated is performed according to not a flag-less instruction code but a flag instruction code.
REFERENCES:
patent: 5129064 (1992-07-01), Fogg, Jr. et al.
patent: 5530875 (1996-06-01), Wach
patent: 5592674 (1997-01-01), Gluska et al.
patent: 5594905 (1997-01-01), Mital
Kabushiki Kaisha Toshiba
Mohamed Ayni
Teska Kevin J.
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