Patent
1990-07-17
1994-12-27
Shaw, Dale M.
395575, G06F 1516
Patent
active
053773225
ABSTRACT:
Several processors and several communication control units are connected to a transmission medium. Each communication control unit has one or more terminal devices connected to it, and so any terminal device can be coupled to any processor. Each processor includes a central processing unit, a memory, and a control manager. The memory stores first information regarding processing being done with a terminal device coupled to the processor and second information regarding the communication control units connected to each of the processors and regarding the terminal devices being serviced by the processor. The control manager manages the communication control units based on the stored information. Information about the connections between the processors and the communication control units is broadcast to all processors. If any processor is faulty, another processor can take over the processing being done by the faulty processor. Likewise, further, processors can be added to the network, and their connection status is known to all other processors.
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Japanese Literature "Fault Tolerant System" by Grey. Translated by Eiichi Watanabe MacGraw Hill. pp. 57-71.
Kasashima Hirokazu
Kawano Katsumi
Mori Kinji
Ogura Hiroyuki
Orimo Masayuki
Dinh D.
Hitachi , Ltd.
Shaw Dale M.
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