Information carrier and devices for scanning the information...

Dynamic information storage or retrieval – Binary pulse train information signal – Having specific code or form generation or regeneration...

Reexamination Certificate

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Details

C369S059250, C369S275300

Reexamination Certificate

active

06724707

ABSTRACT:

FIELD OF INVENTION
Information carrier and devices for scanning the information carrier The invention relates to an information carrier comprising a recording area for writing patterns which represent user information and a header area comprising patterns which represent header information, said header area comprising a synchronization area comprising a predetermined synchronization pattern for synchronizing a clock frequency in a device in which the information carrier is used.
The invention also relates to reading device for reproducing information from such an information carrier and to a recording device for writing patterns which represent user information onto such an information carrier.
In the context of this application the term marks is to be understood to include all optically detectable regions on the information carrier such as, for example, amorphous regions within a crystalline surrounding on an information carrier of the phase change type or pits on an information carrier comprising embossed data, while the term spaces is to be understood to include all regions surrounding the marks. A pattern of marks and spaces represents the information on an information carrier.
BACKGROUND OF THE INVENTION
An information carrier according to the preamble is known from the European Computer Manufacturers Association Standard ECMA-154. Such an information carrier is also described in the Handbook of Magneto-Optical Data Recording; McDaniel, TW and Victora, RH; Noyes Publications; 1997. On the known information carrier information is recorded in tracks, a track being formed by a 360 degree turn of a continuous spiral. Each track is sub-divided into a number of segments, each segment starting with a header area. The user information is written in the segment areas between the header areas.
The header areas comprise patterns representing header information. This header information is used in a reading device and in a recording device to correctly assess or record information on the information carrier. The header area comprises, for example a pattern (i.e., the Address Mark) indicating that the patterns to follow represent the address of the segment. The header area also comprises a synchronization area, a so-called VFO field, for synchronizing a clock in the reading device and in the recording device in which the information carrier is used. Such a clock is, for example, generated by Variable Frequency Oscillator (VFO) circuitry located in the devices.
This VFO field is used to “lock up”, i.e., establish the proper frequency and phase of the read/write channel clock in the devices when the header is read. More specifically, the VFO field establishes the write channel clock frequency and phase when a segment is being written and it establishes the read channel clock frequency and phase when a segment is being read. In general this “lock up” is realized by Phase Locked Loop (PLL) circuitry which relates the read/write channel clock to a signal obtained by reading the synchronization pattern in the VFO field.
The VFO field is also used to settle the slicer level of circuitry which converts an analog High Frequency (HF) signal, obtained by reading the patterns of marks and spaces representing the information, into a digital information signal. Furthermore, the VFO field is used to set the dynamic range of an Automatic Gain Controlled (AGC) amplifier which ensures that the full range of analog-to-digital conversion circuitry is utilized.
The segment areas between the header areas also comprise a VFO field. The user information is preceeded by a predetermined synchronization pattern, which pattern is used to settle the dynamic range of an Automatic Gain Controlled (AGC) amplifier, to settle the slicer level of circuitry which converts an analog High Frequency (HF) signal, obtained by reading the patterns of marks and spaces representing the information, into a digital information signal, and to settle the proper frequency and phase of the read/write channel clock in the devices when the predetermined synchronization pattern is read. These setting may deviate from those resulting from the reading of the predetermined synchronization pattern in the headers. This is due to the disc making process where header information and user information are not necessarily written with the same frequency and phase.
The VFO field consists of a predetermined synchronization pattern of marks and spaces. The predetermined synchronization pattern of the known information carrier consists of a sequence of 3T marks and 3T spaces, where T represents one channel bit length. This pattern results in a sequence of the shortest possible marks and spaces allowed by a (2, k) Run Length Limited (RLL) code used to convert the information into patterns representing the information on the information carrier, such as for example the EFMplus code used on DVD discs. Because of these short marks and spaces, a signal obtained by reading the VFO field contains a single high frequency which results in a fast “lock up” of the read/write channel clock, in the devices.
However, the predetermined synchronization pattern of the known information carrier has the problem that the setting of the Automatic Gain Controlled (AGC) amplifier is not optimal when a synchronization pattern consisting of sequences of 3T marks and 3T spaces is used.
SUMMARY OF THE INVENTION
It is inter alia an object of the invention to provide an information carrier which comprises a predetermined synchronization pattern which ensures an optimized setting of an Automatic Gain Controlled (AGC) amplifier in a device in which the information carrier is used.
This object is achieved by the information carrier according to the invention which is characterized in that the predetermined synchronization pattern comprises a first part and a second part, the second part being distinguishable from the first part.
When the known predetermined synchronization pattern consisting of sequences of 3T marks and 3T spaces is used, the dynamic range of the Automatic Gain Controlled (AGC) amplifier is set according to the dynamic range of the signal obtained by reading these, single frequency, patterns. The signal amplitude of these short marks is significantly lower than that of the longer marks. The signal amplitude when reading a sequence of these short marks can be as low as 20% of the amplitude when reading a sequence containing also long marks. However, the information on an information carrier consists of a mixture of marks and spaces having all lengths allowed by the applied RLL code. Therefore, the dynamic range of the Automatic Gain Controlled (AGC) amplifier is not set to an optimal value for reading all patterns on the information carrier.
To ensure an optimized setting of the dynamic range of the Automatic Gain Controlled (AGC) amplifier, the predetermined synchronization pattern according to the invention comprises two distinguishable parts; that is, a first part related to patterns resulting in a signal having a lower dynamic range and a second part relates to patterns resulting in a signal having a higher dynamic range. Because of this mixture, the dynamic range of the Automatic Gain Controlled (AGC) amplifier is set to an optimized value for reading all kinds of patterns on the information carrier,
The first and the second part of the synchronization pattern are repeated sufficiently often to guarantee settling of the circuitry in the read/recording device (AGC, slicer level, frequency and phase) well before the actual data is read.
An embodiment of the information carrier according to the invention in which the predetermined synchronization pattern is composed of marks and of spaces between the marks, is characterized in that the first part of the predetermined synchronization pattern contains marks having a first length and spaces having a second length whereas the second part of the synchronization pattern contains marks having a third length and spaces having a fourth length, the first length being different from the third length and the second length bei

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