Inductor with patterned ground shield

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S347000

Reexamination Certificate

active

06452249

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same. More particularly, the invention relates to a semiconductor device including a high-frequency circuit having an inductor.
2. Description of the Background Art
With reference to
FIG. 68
, an example of constructions of a semiconductor device including a high-frequency circuit is described below.
FIG. 68
is a block diagram showing a construction of a semiconductor device
90
having the function of receiving a radio wave signal of a radio frequency (10 kHz to 100 GHz) to output an audio signal.
As illustrated in
FIG. 68
, the semiconductor device
90
comprises an RF circuit portion
91
for demodulating the received radio wave signal, a logic portion
92
for processing the signal demodulated by the RF circuit portion
91
to convert the processed signal into the audio signal, and a memory cell portion
93
for storing therein data required for the RF circuit portion
91
and the logic portion
92
to perform the signal processing. The semiconductor device
90
is connected to an antenna device
94
for detecting the radio wave signal, and a sound output device
95
for outputting the audio signal.
The so-called high-frequency circuit, including the RF circuit portion
91
, has an inductor (inductance element) in addition to a resistor and a capacitor. The inductor which functions to advance the phase of a high-frequency current may be used against a capacitor which functions to delay the phase of the high-frequency current, thereby to provide matching of the high-frequency current.
An inductor L
1
in the RF circuit portion
91
is shown in FIG.
68
. The inductor L
1
has a parasitic capacitor C
1
grounded through a resistor R
1
. The resistor R
1
is a resistor of a semiconductor substrate which forms the RF circuit portion
91
. There is no problem when the resistor R
1
has an extremely low resistance or an extremely high resistance. However, some substrates have a resistance (e.g., about 10 &OHgr;cm) which causes power consumption because of electrostatically induced power dissipation.
FIG. 69
shows a construction for preventing such electrostatically induced power dissipation. In the construction shown in
FIG. 69
, the parasitic capacitor C
1
is not only grounded through the resistor R
1
but also grounded through a resistor R
2
. The resistor R
2
has a resistance extremely lower than that of the resistor R
1
. The high-frequency current predominantly flows to the ground through the resistor R
2
to cause no electrostatically induced power dissipation.
The inductor L
1
is shown as having an end A connected to the antenna device
94
, and an end B connected to a source/drain electrode of a MOS transistor Q
1
. This is an example of inductor connections.
The resistor R
2
is a conductor plate known as a shield plate, and is disposed in an underlying layer of the inductor L
1
.
FIG. 70
is a perspective view showing a construction of the inductor L
1
and the shield plate.
As illustrated in
FIG. 70
, the inductor L
1
is formed of a wire wound in a spiral form and is thus referred to hereinafter as a spiral inductor SI. The center of the spiral which is a first end of the spiral inductor SI is connected to an underlying interconnect line WL through a contact portion CP extending through an interlayer insulation film not shown. The interconnect line WL is disposed on an interlayer insulation film SZ which covers a semiconductor substrate SB.
The interconnect line WL corresponds to the end B of the inductor L
1
shown in
FIG. 69
, and the end A corresponds to a second end of the spiral inductor SI.
The semiconductor substrate SB is an SOI (silicon on insulator) substrate, which is shown in
FIG. 70
as comprising only an SOI layer SL and an isolation oxide film FZ in the SOI layer SL. On the isolation oxide film FZ, a planar shield plate SP having an area at least equal to the area occupied by the spiral inductor SI, as viewed in plan, is disposed in a position corresponding to a region in which the spiral inductor SI is formed.
The shield plate SP is made of a low-resistance conductor similar to the material of the interconnect line, and is grounded through an interconnect line not shown to cause no electrostatically induced power dissipation.
However, current flowing in the spiral inductor SI generates an eddy current inside the shield plate SP to increase electromagnetically induced power dissipation, presenting another problem of the increase in total power dissipation.
To solve the problem, there has been proposed a perforated ground shield (referred to hereinafter as a PG shield) which is a shield plate with portions cut away to interrupt the path of the eddy current.
FIG. 71
shows an example of the PG shield. The PG shield shown in
FIG. 71
comprises a plurality of plates PL electrically insulated from each other. The plates PL are triangular in plan configuration, and are arranged radially so that their apexes constitute a central part of the PG shield.
The use of such a construction interrupts the path of the eddy current to reduce the electromagnetically induced power dissipation.
As described above, the background art semiconductor device having the inductor uses the PG shield to reduce the electrostatically induced power dissipation and the electromagnetically induced power dissipation. However, the formation of the PG shield requires one additional conductor layer to be provided, resulting in the increase in structural complexity and the number of manufacturing steps.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, a semiconductor device comprises: a semiconductor substrate; a shield layer disposed in a main surface of the semiconductor substrate; and an inductance element disposed over a region in which the shield layer is formed, with an interlayer insulation film therebetween, wherein the shield layer has at least one conductive portion connected to a ground potential, and at least one current interrupting portion for interrupting a path of an eddy current induced by the inductance element in a plane of the at least one conductive portion.
Preferably, according to a second aspect of the present invention, in the semiconductor device of the first aspect, the semiconductor substrate is an SOI substrate comprising a substrate portion serving as a foundation, a buried oxide film disposed on the substrate portion, and an SOI layer disposed on the buried oxide film. The at least one current interrupting portion comprises a plurality of selectively disposed isolation oxide films extending from a surface of the SOI layer through the SOI layer to the buried oxide film. The at least one conductive portion comprises a plurality of SOI regions electrically isolated from each other by the plurality of isolation oxide films.
Preferably, according to a third aspect of the present invention, in the semiconductor device of the second aspect, each of the plurality of isolation oxide films has a predetermined width and extends substantially perpendicularly to a surface of the buried oxide film.
Preferably, according to a fourth aspect of the present invention, in the semiconductor device of the second aspect, each of the plurality of isolation oxide films includes a first portion having a first width and extending substantially perpendicularly to a surface of the buried oxide film, and a second portion continuous with and beneath the first portion, the second portion having a second width smaller than the first width and extending substantially perpendicularly to the surface of the buried oxide film.
Preferably, according to a fifth aspect of the present invention, in the semiconductor device of the first aspect, the semiconductor substrate is an SOI substrate comprising a substrate portion serving as a foundation, a buried oxide film disposed on the substrate portion, and an SOI layer disposed on the buried oxide film. The at least one conductive portion comprises a plurality of SOI r

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Inductor with patterned ground shield does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Inductor with patterned ground shield, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Inductor with patterned ground shield will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2899252

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.