Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-07-11
2004-06-29
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S528000
Reexamination Certificate
active
06756656
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to inducting devices incorporated in integrated circuits and in particular the present invention relates to inducting devices having a patterned ground shield with ribbing in an integrated circuit.
BACKGROUND
Integrated circuits incorporate complex electrical components formed in semiconductor material into a single circuit. Generally, an integrated circuit comprises a substrate upon which a variety of circuit components are formed. Integrated circuits are made in and/or on semiconductor material. Conduction in semiconductor material takes place by means of hole and electron flow. The resistance of semiconductor material can vary by many orders-of-magnitude depending on the concentration of impurities or dopants. Semiconductor material is used to make electrical devices that exploit its unique properties.
An inducting device is an electrical component that can be formed in an integrated circuit. Examples of inducting devices are simple inductors, symmetric inductors with or without center taps, transformers, baluns and the like. An inducting device has one or more conductive paths (or conductive turns) formed in a spiral or loop shape. In particular, the conductive turns are typically formed in a circular or polygonal shape. Moreover, the conductive turns may be formed in a single layer or in multiple layers. The conventional measure of an inductor's performance in an integrated circuit is called the Quality Factor or “Q.” Q is defined herein as generally the ratio of the maximum magnetic energy stored in the inductor divided by the energy dissipated by the inductor on each cycle. Two types of parasitics degrade Q in inductor devices formed in integrated circuits. They are parasitic capacitances and parasitic resistances. Accordingly, it is desired to reduce the parasitic capacitances and resistances to obtain a high Q spiral inductor. One method of reducing parasitic resistance is by introducing a patterned ground shield. In particular, if the semiconductor material is highly resistive it is not considered a lossy medium and a shield layer is not needed. However, a common semiconductor substrate is doped to have a resistance around 10-20 ohm-cm. A semiconductor substrate doped at this level tends to be very lossy. The use of a patterned ground shield in an inducting device having a substrate of this resistance reduces this loss. An example of a patterned ground shield is disclosed in the commonly assigned U.S. Pat. No. 5,717,243, which is herein incorporated by reference. Another example of an inductor with patterned ground shield that has both a reduced parasitic capacitance and a parasitic resistance is found in the commonly assigned U.S. patent application Ser. No. 10/039,200, which is also herein incorporated by reference. It is further desired to reduce parasitic resistance to improve the Q in an inductor device.
For the reasons stated above and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for inducting devices with reduced parasitic resistance.
SUMMARY
The above-mentioned problems with spiral inductors in integrated circuits and other problems are addressed by the present invention and will be understood by reading and studying the following specification.
In one embodiment, a shield region for an inducting device in an integrated circuit is disclosed. The shield region comprises a plurality of conductive shield sections, one or more shield taps and one or more conductive ribs for each shield section. Each shield tap is electrically coupled to associated shield sections to provide a current path for shield current in the shield sections. The one or more conductive ribs for each shield section provide a less resistive path to the one or more shield taps. Each conductive rib is electrically coupled to its associated shield section and associated shield tap. Moreover, each conductive rib is more conductive than its associated shield section. The one or more conductive ribs are formed from a conductive layer that is located between the shield sections and conductive turns of the inducting device. In addition, each conductive rib has a relatively thin lateral width with respect to a lateral width of its associated shield section.
In another embodiment, an inducting device for an integrated circuit is disclosed. The inducting device comprises conductive turns to conduct current, a shield layer and a plurality of ribs. The shield layer is formed a select distance from the conductive turns. The shield layer is patterned into sections of shield to prevent eddy currents. The plurality of ribs are formed from a conductive layer that is positioned between the conductive turns and shield layer. Each rib is electrically coupled to a single associated section of shield. Moreover, each rib is more conductive than its associated section of shield to provide a less resistive current path than its associated section of shield.
In another embodiment, a method of forming conductive ribs in an inductive device having patterned shield sections is disclosed. The method comprises forming contacts to the patterned shield sections. Depositing a metal layer overlaying the contacts and patterning the metal layer into ribs, wherein each rib is electrically coupled to an associated shield section via associated contacts.
In yet another embodiment, a method of forming conductive ribs in an inductive device having patterned shield sections is disclosed. The method comprises siliciding a conductive layer overlaying the patterned shield sections and patterning the silicided conductive layer into ribs. Each rib is formed to have a lateral width that is relatively thin with respect to an associated shield segment. Moreover, each rib is further electrically coupled to its associated shield section to provide a less resistive current path for shield current in the associated shield section.
In further another embodiment, a method of forming an inducting device is disclosed. The method comprises forming a conductive shield layer. Patterning the shield layer into shield sections. Forming a conductive rib layer, wherein the conductive rib layer is more conductive than the conductive shield layer. Patterning the conductive rib layer into a plurality of ribs, wherein each rib is electrically coupled to an associated shield section and forming conductive turns, wherein the ribs are positioned between the shield sections and the conductive turns.
REFERENCES:
patent: 5717243 (1998-02-01), Lowther
patent: 6437409 (2002-08-01), Fuji
patent: 2001/0013626 (2001-08-01), Fujii
patent: 2002/0074620 (2002-06-01), Yue
Gary E. McGuire, “Semiconductor Materials and Process Technology Handbook,” Noyes Publications, Norwich, New York, (1988) p. 439.*
William C. O'Mara, Robert B. Herring, and Lee P. Hunt, “Handbook of Semiconductor Silicon Technology,” Noyes Publ., Norwich, New York, (1990) pp. 700-702.*
Rex E. Lowther et al, U.S. patent application No. 10/039,200, “Symmetric Inducting Device for an Integrated Circuit Having A Ground Shield”, filed Jan. 4, 2002.
GlobespanVirata Incorporated
Hunton & Williams LLP
Magee Thomas
Thomas Tom
LandOfFree
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