Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-03-06
2003-12-09
Tran, Thien (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S531000, C257S533000
Reexamination Certificate
active
06661078
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an inductance element and a semiconductor device which includes the inductance element therein, and particularly to a structure of an inductance element which reduces signal loss brought about therein.
BACKGROUND OF THE INVENTION
Recently, with rapid miniaturization of portable communication devices such as a cellular phone, it has been being required to realize high frequency integrated circuits, such as an IC (Integrated Circuit) and an LSI (large-scale integration), which are used in these devices, by using a circuit provided on a silicon semiconductor substrate.
In addition to passive elements such as a transistor, a resistor, and a capacitor, an inductance element is required in the high frequency integrated circuit. Thus, in order to realize miniaturization of a device using the high frequency integrated circuit, all the foregoing passive elements including the inductance element need to be provided on the silicon semiconductor substrate. The inductance element for a silicon IC is typically provided on the silicon semiconductor substrate via an insulating film, and is made, for example, by providing a belt-shaped conductive film of aluminum (Al) in a spiral manner (in a vortex manner) or in a meandering manner.
A structure of a conventional inductance element is described as follows by reference to FIG.
8
and FIG.
9
.
FIG. 8
is a plan view which schematically shows a structure of an inductance element formation section in the conventional semiconductor device. Further,
FIG. 9
is a cross sectional view in a line D-D′ of the inductance formation section of the semiconductor device shown in FIG.
8
. Note that, in
FIG. 8
, insulating films
5
,
6
, and
7
are not displayed, but patterns are given to respective components. That is, the same component has the same pattern in FIG.
8
.
As shown in
FIG. 9
, the conventional inductance element has the following structure. The insulating films
5
and
6
are provided on a main surface of a semiconductor substrate
4
, such as a silicon semiconductor substrate, in this order. A connection wire
3
, connected to one terminal of an inductance section which is composed of a conductive film pattern
1
described later, is provided on the insulating film
6
. The inductance section, which is composed of the conductive film pattern
1
provided in a spiral manner (in a vortex manner) as shown in
FIG. 8
, is provided on the insulating film
7
which covers the connection wire
3
.
In the inductance section which is composed of the conductive film pattern
1
in a spiral manner, the one terminal (drawing terminal) is formed at a substantially central portion of the spiral. Further, the inductance section is connected to the connection wire
3
via a via-hole (not shown) at a position of the terminal, that is, at a substantially central portion of the spiral.
The connection wire
3
is externally drawn from the inductance section as a drawing wire for connecting to an external portion of the inductance element. The inductance element is, for example, provided in a semiconductor device, that is, provided on a semiconductor substrate of the semiconductor device internally or externally. For example, the foregoing semiconductor substrate
4
is used as the semiconductor substrate of the semiconductor device, so that the inductance element is electrically connected to an electrode pad (not shown) etc, provided on the main surface of the semiconductor substrate
4
, which is electrically connected to a transistor (not shown) etc. making up an integrated circuit such as an LSI.
However, in the conventional inductance element having the foregoing structure, when a current is applied to the inductance section, an excess current occurs on a surface of the semiconductor substrate
4
due to electromagnetic induction of a current applied to the conductive film pattern
1
making up the inductance section. Therefore, a resistance component of the semiconductor substrate
4
causes a high frequency signal passing through the inductance section to be reflected and to be lost. It is known that this results in deterioration of the performance of the conventional inductance element entirely.
Generally, it is often that the inductance element is used at a high frequency band. However, the signal loss of the semiconductor substrate
4
occurs frequently particularly at a high frequency band. The performance of the inductance element is deteriorated by a parasitic component which occurs due to a shape etc. of the conductive film pattern
1
making up the inductance section.
Thus, in the semiconductor substrate
4
of the conventional inductance element, a signal loss at an area under the spiral conductive film pattern
1
is extremely large, so that the inductance element cannot be preferably used at a high frequency band.
Then, as an improving measure, Japanese Unexamined Patent Publication No. 181289/1994 (Tokukaihei 6-181289) (publication date: Jun. 28, 1994) discloses an inductance element having the following structure. A grounded metallic thin film is provided near the conductive film pattern
1
formed above the semiconductor substrate
4
, so that characteristic impedance is adjusted. Thus, reflection and loss of a high frequency signal are reduced.
Concretely, in the inductance element recited in Japanese Unexamined Patent Publication No. 181289/1994, the influence upon the semiconductor substrate
4
, which is exerted by electromagnetic induction of a current applied to the inductance section, is reduced by forming an inductance section on a grounded metallic thin film, so that a signal loss of the semiconductor substrate
4
, that is, a characteristic loss is reduced.
By reference to FIG.
10
and
FIG. 11
, the inductance element of the semiconductor device, recited in Japanese Unexamined Patent Publication No. 181289/1994, is described as follows.
FIG. 10
is a plan view showing a schematic structure of an inductance element formation section of the semiconductor device recited in Japanese Unexamined Patent Publication No. 181289/1994. Further,
FIG. 11
is a cross sectional view in a line E-E′ of the semiconductor device shown in FIG.
10
. Note that, in
FIG. 10
, for the sake of convenience in description, the insulating films
5
,
6
, and
7
shown in
FIG. 11
are not displayed, and patterns are given to the respective components. That is, in
FIG. 10
, the same pattern is given to the same component. Further, in the following description, the same signs are given to components having the same functions as components shown in FIG.
8
and
FIG. 9
, and description thereof is omitted.
In the foregoing semiconductor device, the insulating film
5
is provided as a first insulating film on a main surface of the semiconductor substrate
4
, and a metallic thin film
2
, which is a grounding metallic film (grounding potential layer), is provided on the insulating film
5
so that substantially all the surface of the semiconductor substrate
4
except for marginal portions is covered. Further, in the semiconductor device, after the metallic thin film
2
is coated by the insulating film
6
which serves as a second insulating film, the connection wire
3
which serves as a drawing wire for external connection at the inductance section is provided on the insulating film
6
. Further, in the semiconductor device, the insulating film
7
which serves as a third insulating film is provided so as to cover the connection wire
3
, and the conductive film pattern
1
making up the inductance section is provided in a spiral manner (in a vortex manner) on the insulating film
7
.
However, in the inductance element recited in Japanese Unexamined Patent Publication No. 181289/1994, the grounded metallic thin film
2
is provided on the insulating film
5
formed on the main surface of the semiconductor substrate
4
, so that parasitic capacitance is formed at a portion where the conductive film pattern
1
or the connection wire
3
is lapped by the metallic thin film
2
in
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
Tran Thien
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