Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – Active layer of indirect band gap semiconductor
Reexamination Certificate
2001-04-05
2003-01-07
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
Active layer of indirect band gap semiconductor
C257S046000, C257S087000, C257S106000, C257S601000, C257S656000, C257S749000
Reexamination Certificate
active
06504178
ABSTRACT:
BACKGROUND
The present invention relates to semiconductor imaging devices, and more specifically to indirect back surface contact in such imaging devices.
Many semiconductor device structures, such as photodiode arrays, include circuit elements fabricated within a few micrometers of one surface of a die cut from a wafer. This surface is often the front surface. The metal or polysilicon lines connecting individual circuit elements are located on the front side of the die. Therefore, electrical connection to the back surface of the semiconductor is made through one or more conductive back contact layers external to the semiconductor and covering all or part of the back surface of the die. Materials commonly used for external contact layers, individually or in combination, are metals, heavily doped polycrystalline semiconductors, conductive dielectrics such as indium-tin oxide (ITO), and conductive adhesives.
When the back contact to the die is made through the back surface, the process of making an electrical contact also requires making a physical contact to the back of the die. The need to make the physical contact increases the complexity of the assembly process necessary to integrate the die into higher-level systems such as multi-chip modules (MCM). For example, in a “flip-chip” mounting, conductive “bump” contacts are made to bonding pads on the front surface of the die. The die is then flipped so that the bump contacts can be bonded or soldered to corresponding contacts on the top surface of a printed circuit board or semiconductor MCM. The back surface contact cannot be accomplished directly in the flip-chip process. Therefore, a second, distinct process may be performed to connect the back surface to the MCM. In some cases, where the geometry is very restrictive, there may not be any space to make the necessary wire- or tape-bond from the back of the wafer to the MCM.
In the case of back-illuminated photodiodes or radiation detectors, the presence of the physical contact has several other disadvantages. The back contact may make part of the back opaque and therefore may decrease the effective area of the detector. It may also interfere with the attachment of optical input structures, such as optical fibers or scintillators, which need to be mounted close to the back surface for good optical coupling. The physical contact may reduce the maximum area of the optical input device.
The physical contact may also limit the options for assembling mosaic detectors, in which several small detectors could be illuminated through a single fiber or scintillator. Even if no optical input structure is used, assembling a large mosaic structure such as an integrating sphere of back-illuminated detectors may be complicated by the need to make physical contact to the back of each individual detector.
Further, back-illuminated detectors often employ a thin, conductive bias electrode layer within the semiconductor. The detectors may also employ one or more thin, transparent external back contact layers. The transparent bias electrode layer may transmit a high percentage of incident light in the wavelength range of interest. The layer should be thin enough and have a long enough diffusion length so that minority photocarriers generated within the layer have a high probability of being collected. However, both the bias electrode layer and the thin external contact structure may be easily damaged. Great care must be exercised in forming the physical contact. In addition, electrical current passing through the interface between the external contact and the internal bias electrode layer can be a significant source of electrical noise.
A plurality of p-i-n photodiode array structures is typically fabricated on a single semiconductor wafer. The individual arrays. are then separated by “dicing” the wafer into “chips”. The dicing process inherently produces additional surfaces on the “edges” of the chips. These surfaces can generate minority carriers that can drift or diffuse into the active regions of the device, significantly increasing the leakage currents of the photodiodes.
SUMMARY
The present disclosure includes a semiconductor photodiode array. The array includes a substrate having at least first and second surfaces opposing each other, and one or more circuit layers.
The substrate is doped to exhibit a first conductivity type. The substrate includes a thin, conductive internal bias electrode layer, an indirect back contact region, and a plurality of doped regions. The bias electrode layer includes one or more first type dopants incorporated near the first surface. The indirect back contact region includes a heavily doped area formed near the second surface. This region is configured to provide contact to the first surface from the second surface. The plurality of doped regions includes one or more second type dopants near the second surface.
One or more circuit layers are formed over the second surface to provide electrical contacts to and readout circuits for the plurality of doped regions. The readout circuits may generate electrical output signals that depend on the response of the individual photodiodes to incoming photons.
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Carlson Lars S.
Wilson Richard
Zhao Shulai
Digirad Corporation
Fish & Richardson P.C.
Flynn Nathan J.
Forde Remmon R.
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