Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
2011-03-01
2011-03-01
Smith, Bradley K (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
Reexamination Certificate
active
07898009
ABSTRACT:
Memory cells are constructed from double-gated four terminal transistors having independent gate control. DRAM cells may use one, two or three transistors. Single transistor cells are constructed either with or without a bit storage capacitor, and both NAND- and NOR-type Non-Volatile NVRAM cells, as well as Ferroelectric FeRAM cells, are described. For all cells, top gates provide conventional access while independent bottom gates provide control to optimize memory retention for given speed and power parameters as well as to accommodate hardening against radiation. In a single transistor cell without a capacitor, use of the bottom gate allows packing to a density approaching 2 F2. Using a ferroelectric material as the gate insulator produces a single-transistor FeRAM cell that overcomes the industry-wide Write Disturb problem. The memory cells are compatible with SOI logic circuitry for use as embedded RAM in SOC applications.
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DeGregorio Kelly James
Hackler, Sr. Douglas R.
Parke Stephen A.
Wilson Dale G.
American Semiconductor, Inc.
Frohwerk Robert A.
Smith Bradley K
Your Intellectual Property Matters, LLC
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