Independently controllable multiple address registers for a data

Details Independently controllable multiple address registers for a data Independently controllable multiple address registers for a data

1977-04-12

1978-12-19

Chapnick, Melvin B.

Boots, shoes, and leggings

G06F 920

Patent

active

041308689

ABSTRACT:
A microprocessor has a common data bus coupled to a storage data register, two separate storage address registers and a storage control unit. The data register transfers data to and from a storage unit addressed by that address register selected by a gating means. The address registers can be independently incremented and decremented, and perform either a read or a write operation. All these functions are specified by signals produced from a control word held in the storage control unit.

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