Coded data generation or conversion – Converter compensation
Reexamination Certificate
2000-10-25
2002-07-30
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Converter compensation
C341S120000, C341S144000
Reexamination Certificate
active
06426713
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a AD converters and, more particularly to independent control of calibration registers in a multi channel AD converter.
BACKGROUND OF THE INVENTION
Techniques for amplification of an analog signal, sampling and converting the signal to digital and processing that signal using digital techniques are known in the art. An example of an analog signal source is that provided by a measurement sensor such as a strain gauge.
Instrumentation amplifiers are commonly used to amplify values of an analog signal. Noise, distortion and offset are critical performance parameters.
Following an instrumentation amplifier in a signal processing chain is an analog to digital converter. At its input, the signal is sampled onto a capacitor. To reduce loading effects of the sample process used to sample an analog signal, a rough buffer is used to precharge the sampling capacitor followed by a period of fine adjustment. The sampled analog signal is converted to digital, such as a one bit digital stream and filtered to produce a multibit digital signal.
Filters for doing such processing, such as FIR filters and FIR sinc filters are known. Some such filters may use coefficients for multiplying digital values. Others, such as Hogenauer filters, described in an article by Eugene B. Hogenauer, entitled “AN ECONOMICAL CLASS OF DIGITAL FILTERS FOR DECIMATION AND INTERPOLATION,” published in IEEE Transactions on Acoustics, Speech and Signal Processing, Volume ASSP-29, No. 2, April 1981, perform the filtering without coefficients.
U.S. Pat. No. 4,851,841, issued to Navdeep S. Sooch on Oct. 2, 1987, describes a delta-sigma modulator wherein the full-scale analog input voltage is set below a maximum effective feedback reference voltage by a predetermined factor; and, the impulse-response coefficients of a digital decimation filter coupled to the output of the delta-sigma modulator are selected to provide full-scale digital output when a full-scale analog input voltage is applied to the analog voltage input.
Scaling and gain calibration require the use of a multiplier. Multipliers are known which use 2's complement addition to perform multiplication. However, such multipliers require a fair amount of power, machine cycles and silicon real estate to implement.
An important measure of a device used in processing industrial measurement signals is the amount of 1/f noise present at its output or referred to its input. When low frequency characterization in the range of 0.1 Hz is desired, measurement of 1/f noise requires greater than 1/(0.1 Hz)=10 seconds. This amount of time is not conducive to high volume mass production of integrated circuits.
It would be desirable to have a programmable ultra low noise instrumentation amplifier which could handle a plurality of channels in a flexible way and be able to test its performance quickly so that high volume production can be sustained.
An important application area for precision instrumentation is industrial measurement. Signal levels from sensors such as bridge transducers are small, but resolution requirements are stringent. It is also important that features on a measurement IC are chosen to minimize the need for external components with their potential error contributions.
SUMMARY OF THE INVENTION
The invention is directed to mechanisms for assign one of a plurality of gain registers with an independently selected one of a plurality of offset register when processing signals from a physical channel input to a signal processing chip.
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Amar Aryesh
Angel Edwin De
Swanson Eric J.
Cirrus Logic Inc.
Lin Steven
Murphy James J.
Nguyen Khai M.
Tokar Michael
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