Independent computer storage addressing in input/output transfer

Details Independent computer storage addressing in input/output transfer Independent computer storage addressing in input/output transfer

1995-03-02

1997-05-27

Chan, Eddie P.

395846, 395418, G06F 1328, G06F 1206

Patent

active

056340079

ABSTRACT:
A method and apparatus for performing direct memory address (DMA) operations between a requestor and responder device by prestoring, for each device, a logical token and offset value which is recognizable by the device as an indicia to identify one or more local memory addresses within the device, and initiating a DMA operation within the requestor device by the requestor device transferring the token and offset value to the responder device, the responder device identifying a responder device local memory address by translation of the token and offset value, and the responder device accessing the identified responder local memory address for data transfer, associated with the token and offset, and the requestor device identifying a requestor device local memory address for completing the data transfer.

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"Multibus II--an architecture for 32-bit systems", J. Deaston, Electronic Engineering, Mar. 1984, pp. 47-51.
IBM Technical Disclosure Bulletin vo. 27, No. 7A, Dec. 1984 Use of Request Tokens to Eliminate Address Dependencies on DMA Storage to Storage Transfers.

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