Incrementer/decrementer circuit

Details Incrementer/decrementer circuit Incrementer/decrementer circuit

1977-05-02

1978-02-21

Thesz, Joseph M.

Registers

Platform operated

Platform actuated traffic counters

235 92LG, 235 92GT, 235 92SH, 235 92R, 307222C, G06M 314, H03K 2330

Patent

active

040754642

ABSTRACT:
A digital circuit for sensing the signal on a data bus, selectively incrementing or decrementing the binary signal and reapplying it to the bus. The circuitry includes a binary counter comprising a temporary storage cell for each bus conductor. The output of each cell controls the conduction through an adjacent portion of a pre-charged conductor which is periodically discharged at the least significant digit cell and which, when charged adjacent a higher order cell, will inhibit the toggling of that cell. All bus lines are pre-charged to a binary "1" at a particular instant followed by the discharge to "0" of those lines whose respective cells contain a binary "0".

REFERENCES:
patent: 3654441 (1972-04-01), Bharali
patent: 3675044 (1972-07-01), Vogelsberg
patent: 3940596 (1976-02-01), Paddock

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