Incremental logic synthesis system for efficient revision of log

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

364489, 364488, G06F 1750

Patent

active

054368499

ABSTRACT:
An apparatus and method for incremental logic synthesis that transforms a revised technology-independent electronic digital circuit design into a revised technology-dependent design deviating as little as possible from the original technology-dependent design. The incremental synthesis procedure includes a forward sweep technique where nodes in the revised technology-independent model and the original technology-dependent design are compared to see if they map the same logical function of the inputs common to both designs. A backward sweep technique compares nodes in the revised technology-independent model to the unrevised technology-dependent design to see which outputs common to both map the same logical node functions. Portions of the revised technology-independent model with the same logical function as corresponding parts of the unchanged technology-dependent design are progressively eliminated, reducing the revised technology-independent design to an "increment" that is then conventionally synthesized and merged with the unchanged technology-dependent design to yield the revised technology-dependent design having only the minimal necessary revisions.

REFERENCES:
patent: 4493045 (1985-01-01), Hughes, Jr.
patent: 4583169 (1986-04-01), Cooledge
patent: 4612618 (1986-09-01), Pryor et al.
patent: 4636966 (1987-01-01), Yamada et al.
patent: 4703435 (1987-10-01), Darringer et al.
patent: 4805113 (1989-02-01), Ishii et al.
patent: 4827428 (1989-05-01), Dunlop et al.
patent: 4829446 (1989-05-01), Draney
patent: 4882690 (1989-11-01), Shinsha et al.
patent: 5003487 (1991-03-01), Drumm et al.
patent: 5282147 (1994-01-01), Goetz et al.
E. Cerny and C. Mauras, "Tautology Checking Using Cross-Controllability and Cross-Observability Relations", IEEE, pp. 34-37, 1990.
"Incremental Logic Synthesis Through Gate Logic Structure Identification" by T. Shinsha et, IEEE, 1986, pp. 391-397.
"Establishment of Higher Level Logic Design For Very Large Scale Computer" by Y. Tsuchiya et al, IEEE, 1986, pp. 366-371.
"Transform System for Boolean Comparison", IBM Technical Disclosure Bulletin, vol. 32, No. 10A, Mar. 1990, pp. 148-150.
"Fully Self-Contained Memory Card Extended Error Checking/Correcting Hardware Implementation" by Weaver et, IBM Tech. Discl. Bltin, vol. 31, No. 5, 1990, pp. 352-355.
"Boolean Comparison of Hardware and Flowcharts", by Smith et al, IBM Journal Res. Develop., vol. 26, No. 1, (1982), pp. 106-116.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Incremental logic synthesis system for efficient revision of log does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Incremental logic synthesis system for efficient revision of log, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Incremental logic synthesis system for efficient revision of log will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-744824

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.