Incremental compilation of packet classifications using...

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Routing data updating

Reexamination Certificate

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C709S249000, C370S392000, C370S401000

Reexamination Certificate

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11280549

ABSTRACT:
An improvement in the compilation of classification tables from across control lists increases the efficiency of memory utilization by fragments in the lower level tables and using the classification ID's from a pair of higher-level tables as pointers to the fragments and as indicators of the depth of the entries in the fragments. A further improvement makes use of aggregate bit vectors, thereby simplifying construction of the lower-level tables. The bit-vector sections preferably coincide with the cache lines of the processing, thereby maximizing the speed with which the relevant bits in the bit vector can be identified from the aggregate bit vectors.

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