Increment/decrement sampling phase shifter

Details Increment/decrement sampling phase shifter Increment/decrement sampling phase shifter

1987-12-09

1990-02-20

Shoop, Jr., William M.

Coded data generation or conversion

Analog to digital conversion followed by digital to analog...

341120, 3645135, H03M 110

Patent

active

049030221

ABSTRACT:
An analog interface system interfaces with a digital signal processor. The system receives analog signals, digitizes those signals and transmits them to the signal processor upon completion of the conversion. The system directs transmission of digital data from the signal processor to the system, and converts it to analog as the output of the system. The digital signal processor determines whether the sampling rate of the D-to-A and A-to-D converters is correct for the rate at which the data is being received by the respective converters. If not, the DSP sends a number of master clock cycles to the system which then retards or advances the sampling rate of the converter by that number of clock cycles.

REFERENCES:
patent: 4053926 (1977-10-01), Lemoine et al.
patent: 4638451 (1987-01-01), Hester et al.
patent: 4692738 (1987-09-01), Suzuki
patent: 4772873 (1988-09-01), Duncan

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