Increasing readout speed in CMOS aps sensors through block...

Television – Camera – system and detail – Solid-state image sensor

Reexamination Certificate

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Details

C348S302000, C348S304000, C348S307000, C348S241000, C348S246000, C348S294000, C250S208100

Reexamination Certificate

active

08054361

ABSTRACT:
A method and associated architecture for dividing column readout circuitry in an active pixel sensor in a manner which reduces the parasitic capacitance on the readout line. In a preferred implementation, column readout circuits are grouped in blocks and provided with block signaling. Accordingly, only column output circuits in a selected block significantly impart a parasitic capacitance effect on shared column readout lines. Block signaling allows increasing pixel readout rate while maintaining a constant frame rate for utility in large format high-speed imaging applications.

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