Increasing readout speed in CMOS APS sensors through block...

Details Increasing readout speed in CMOS APS sensors through block... Increasing readout speed in CMOS APS sensors through block...

2005-01-25

2005-01-25

Garber, Wendy R. (Department: 2612)

Television

Camera, system and detail

Solid-state image sensor

Reexamination Certificate

active

06847399

ABSTRACT:
A method and associated architecture for dividing column readout circuitry in an active pixel sensor in a manner which reduces the parasitic capacitance on the readout line. In a preferred implementation, column readout circuits are grouped in blocks and provided with block signaling. Accordingly, only column output circuits in a selected block significantly impart a parasitic capacitance effect on shared column readout lines. Block signaling allows increasing pixel readout rate while maintaining a constant frame rate for utility in large format high-speed imaging applications.

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