Increased performance of graphics memory using page sorting fifo

Details Increased performance of graphics memory using page sorting fifo Increased performance of graphics memory using page sorting fifo

1997-05-30

1999-12-14

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Interface

345520, 345513, 345509, 345515, 345511, G06F 1316

Patent

active

060024127

ABSTRACT:
A sorting fifo for use in a memory controller of a graphics system is provided to rearrange the order of an incoming stream of pixels such that groups of pixels to the same page are grouped together. By rearranging the order of pixels before they are forwarded to a frame buffer memory, the repaging delays at the frame buffer memory may be minimized, and the overall performance of the graphics system is increased. The sorting fifo may include, for example, a pair of fifos coupled to a common controller. The controller is also coupled to the input address bus. The controller compares the page addresses of data received on the input address bus against page addresses of data references stored in the fifos. When there is a match, the data reference is forwarded to the appropriate fifo. The controller also controls the reading of data out of the fifo, to ensure that the rearranged order is preserved.

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