Increased NAND flash memory read throughput

Details Increased NAND flash memory read throughput Increased NAND flash memory read throughput

2011-03-08

2011-03-08

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185120, C365S185330, C365S189020, C365S230020, C365S235000

Reexamination Certificate

active

07903463

ABSTRACT:
A method of reading sequential pages of flash memory from alternating memory blocks comprises loading data from a first page into a first primary data cache and a second page into a second primary data cache simultaneously, the first and second pages loaded from different blocks of flash memory. Data from the first primary data cache is stored in a first secondary data cache, and data from the second primary data cache is stored in a second secondary data cache. Data is sequentially provided from the first and second secondary data caches by a multiplexer coupled to the first and second data caches.

REFERENCES:
patent: 5559952 (1996-09-01), Fujimoto
patent: 5787445 (1998-07-01), Daberko
patent: 5956743 (1999-09-01), Bruce et al.
patent: 7394288 (2008-07-01), Agarwal
patent: 7525842 (2009-04-01), Nguyen et al.
patent: 2005/0005069 (2005-01-01), Au et al.
patent: 2005/0228962 (2005-10-01), Takase et al.
patent: 2008/0181003 (2008-07-01), Nguyen et al.

Affiliated with

Also associated with

Rating

Increased NAND flash memory read throughput does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Increased NAND flash memory read throughput, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Increased NAND flash memory read throughput will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2624276