Incorporation of critical dimension measurements as...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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C700S121000, C438S014000

Reexamination Certificate

active

06535774

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention pertains to controlling photolithography operations in a semiconductor manufacturing process and, more particularly, to controlling overlay operations in a manner independent of and parallel to critical dimension control.
2. Description of the Related Art
Semiconductor devices, or microchips, are manufactured from wafers of a substrate material. Layers of materials are added, removed, and/or treated during fabrication to create the integrated, electrical circuits that make up the device. The fabrication essentially comprises four basic operations. The four operations are:
layering, or adding thin layers of various materials to a wafer from which a semiconductor is produced;
patterning, or removing selected portions of added layers;
doping, or placing specific amounts of dopants in the wafer surface through openings in the added layers; and
heat treatment, or heating and cooling the materials to produce desired effects in the processed wafer.
Although there are only four basic operations, they can be combined in hundreds of different ways, depending upon the particular fabrication process. See, e.g., Peter Van Zant,
Microchip Fabrication A Practical Guide to Semiconductor Processing
(3d Ed. 1997 McGraw-Hill Companies, Inc.) (ISBN 0-07-067250-4).
Of these four operations, many in the art consider patterning to be the most critical. Patterning is known to those in the art by many names. Other names for patterning include photolithography, photomasking, masking, oxide removal, metal removal, and microlithography. The term “photolithography” will hereafier be used to refer to patterning operations.
Photolithography typically involves a machine called an “exposure tool,” or sometimes also called a “stepper.” An exposure tool positions a portion of a wafer being processed under a “reticle,” or photomask. A reticle is a copy of a pattern created in a layer of chrome on a glass plate. Light is then shone through the reticle onto a layer of material called “photoresist” previously added to the wafer. The chrome blocks some of the light. The light shining through the pattern on the reticle changes the material characteristics of the photoresist where it shines. These changes make the photoresist more or less susceptible to removal in another operation, depending on the particular process being implemented. This operation generally sets the “critical dimensions” of the semiconductor devices under fabrication. “Critical dimensions” are the line widths of the electrically conductive traces and the width of the insulating materials between the traces that define the pattern. The exposure tool then positions another portion of the wafer under the reticle, and the operation is repeated. This process is repeated until the entire wafer has undergone the operation.
The purpose of photolithography is to create in or on a wafer the parts of what will ultimately be the semiconductor device. The parts must be laid down in the precise dimensions, within manufacturing tolerances, required by the circuit design and to locate them in their proper place. The laying down the parts in the precise dimensions implicates what is known as “critical dimension control.” Critical dimension control ensures that portions of the pattern containing critical dimensions are laid down precisely. Locating the parts in their proper place implicates what is known as “overlay control.” Overlay control ensures that the reticle precisely overlays, or registers with, the wafer.
Critical dimension control and overlay control are important because successive steps of the fabrication process tend to be interdependent. Thus, a slight variation in parameter(s) of one process step can be compounded by a further variation in the parameters of a second process step to produce unacceptable numbers of defective product at the output end of the mass-production line. For instance, overlay control involves measuring the misalignment between two successive patterned layers on the surface of a semiconductor device. Generally, minimization of misalignment errors is important to ensure that the multiple layers of the semiconductor devices are connected and functional. As technology facilitates smaller critical dimensions for semiconductor devices, the need for reduced misalignment errors increases dramatically to ensure functional circuits.
Photolithography critical dimension control utilizes changes to the exposure recipe to modify the performance of an exposure tool and ensure, at least theoretically, proper dimensioning. However, these recipe changes will also affect the performance of overlay, typically adversely, and this affect is not accounted for in overlay control. Thus, the overlay controller and the critical dimension controller operate independently of each other, but do not function independently of each other.
The present invention is directed to resolving one or all of the problems mentioned above.
SUMMARY OF THE INVENTION
The invention, in its various aspects, is a method and apparatus for processing a semiconductor wafer. The method, in one embodiment, comprises processing a wafer lot through an exposure tool; identifying a disturbance in an overlay operation arising from critical dimension control of the exposure tool; modeling the identified disturbance; and applying the model to modify an overlay input parameter. The invention, in another aspect, is an apparatus for controlling a photolithography process. The apparatus comprising an exposure tool and a computer. The exposure tool includes an overlay controller capable of receiving a plurality of overlay control inputs and a critical dimension controller. The computer receives data from the exposure tool and is programmed to perform a method. The programmed method includes identifying a disturbance in an overlay operation arising from critical dimension control of the exposure tool; modeling the identified disturbance; and applying the model to modify an overlay control input.


REFERENCES:
patent: 4703434 (1987-10-01), Brunner
patent: 5701013 (1997-12-01), Hsia et al.
patent: 5783342 (1998-07-01), Yamashita et al.
patent: 5877861 (1999-03-01), Ausschnitt et al.
patent: 5926690 (1999-07-01), Toprac et al.
patent: 5952132 (1999-09-01), King et al.
patent: 6092031 (2000-07-01), Yasuda
patent: 6137578 (2000-10-01), Ausschnitt
patent: 6166801 (2000-12-01), Dishon et al.
patent: 6233494 (2001-05-01), Aoyagi
patent: 6238939 (2001-05-01), Wachs et al.
patent: 6263255 (2001-07-01), Tan et al.
patent: 6269322 (2001-07-01), Templeton et al.

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