In-process system level test before surface mount

Details In-process system level test before surface mount In-process system level test before surface mount

2007-10-09

2007-10-09

Karlsen, Ernest (Department: 2829)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

C324S765010

Reexamination Certificate

active

10912910

ABSTRACT:
Methods and systems for testing an integrated circuit during an assembly process are described. The integrated circuit is received from inventory. The integrated circuit is placed in a socket on a first circuit board for system-level testing. The system-level testing is performed prior to placement and permanent attachment of the integrated circuit onto a second circuit board. Provided the integrated circuit passes the system-level testing, the placement and permanent attachment of the integrated circuit to the second circuit board is the next step following the system-level testing in the assembly process.

REFERENCES:
patent: 2795755 (1957-06-01), Anthes et al.
patent: 5247689 (1993-09-01), Ewert
patent: 5409568 (1995-04-01), Vasche
patent: 5499248 (1996-03-01), Behrens et al.
patent: 5635718 (1997-06-01), DePuydt et al.
patent: 5818252 (1998-10-01), Fullman et al.
patent: 5913034 (1999-06-01), Malcolm
patent: 6878172 (2005-04-01), Jensen
patent: 6914424 (2005-07-01), Chi et al.

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