Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only
Reexamination Certificate
2002-07-24
2004-02-03
Ngo, Julie (Department: 2871)
Liquid crystal cells, elements and systems
Particular structure
Having significant detail of cell structure only
C349S043000, C349S038000
Reexamination Certificate
active
06686986
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an IPS (In Plane Switching) liquid crystal displaying apparatus by generating an electric field parallel to an array substrate to drive the liquid crystal. More particularly, the present invention relates to a construction of a highly bright liquid crystal displaying apparatus increased in aperture ratio by reducing influences of the leakage of electric field from a signal line, thereby reducing the light shielding area.
In an active matrix type liquid crystal displaying apparatus, an IPS system where the direction of the electric field to be applied on the liquid crystal is made parallel to the array substrate is mainly used as a method of obtaining a wider viewing angle (for example, see Japanese Unexamined Patent Publication No. 254712/1996). It is reported that this system enables to remove the almost all of the change in the contrast and the inversion of the gradation level in changing the viewing-angle direction (see, for example, AsiaDisplay, 95, page, 577 to 580 by M. Oh-e, and others).
A construction of one pixel of the conventional IPS liquid crystal displaying apparatus is depicted in
FIGS. 43
a
and
43
b.
FIG. 43
a
is the plain view thereof.
FIG. 43
b
is a sectional view taken along a line A—A of
FIG. 43
a.
FIG. 44
is a circuit diagram showing an equivalent circuit of one pixel of the pixel electrode of an IPS liquid crystal displaying apparatus.
FIG. 45
is a circuit diagram for illustrating the circuit of the IPS liquid crystal displaying apparatus. Referring to
FIGS. 43
a
and
43
b,
reference numeral
1
denotes a glass substrate, numeral
2
denotes a scanning line, numeral
3
denotes a signal line, numeral
4
denotes a thin film transistor (TFT), numeral
5
denotes a driving electrode, numeral
6
denotes an opposite electrode, numeral
7
denotes an electrode for forming the storage capacitance, numeral
8
denotes common line, numeral
9
denotes a gate insulating film, numeral
10
′ denotes a passivation film, numeral
11
denotes a liquid crystal, numeral
12
denotes a BM (black matrix), numeral
14
denotes a contact hole, numeral
15
denotes a source electrode, and numeral
16
denotes a drain electrode. Numeral
20
denotes an array substrate comprising glass substrate
1
, a signal line
3
, a driving electrode
5
, an opposite electrode
6
. Numeral
30
denotes an opposite substrate arranged opposite to the array substrate
20
. Numeral
40
denotes a slit which is a gap between the signal line
3
and the opposite electrode
6
, and numeral
50
denotes an opening. Referring to FIG.
44
and
FIG. 45
, the same reference numerals as those of
FIGS. 43
a
and
43
b
depict the same parts or its equivalents as those of
FIGS. 43
a
and
43
b.
The construction and operation of the conventional IPS liquid crystal displaying apparatus will be described according to
FIGS. 43
a
and
43
b,
FIG.
44
and FIG.
45
. Referring to
FIG. 45
, a plurality of grid shaped pixels encircled by the scanning line
2
and the signal line
3
can be made by crossing, at an approximately right angle between a scanning line
2
connecting the scanning line driving circuit
102
and a signal line
3
connecting the signal line driving circuit
101
. A TFT (Thin Film Transistor) is provided at each intersection point between a signal line and a scanning line for forming the grid shaped pixel. Numeral
103
denotes a circuit for common lines.
This condition is shown by an equivalent circuit in FIG.
44
. The TFT
4
is a semiconductor element having three electrodes of a gate electrode, a source electrode
15
and a drain electrode
16
. The gate electrode is connected with a scanning line
2
extended from the scanning line driving circuit. The source electrode
15
is connected with a signal line
3
connected with the signal line driving circuit. The remaining drain electrode
16
, connected with the driving electrode
5
, drives the liquid crystal by an electric field caused between the driving electrode
5
and the opposite electrode
6
. Numeral
7
denotes a storage capacitance for storing the electric charge between the driving electrode
5
and the opposite electrode
6
. The construction of one pixel will be described in accordance with
FIG. 43
a
and
FIG. 43
b
. In a pixel formed through the crossing between the scanning line
2
and the signal line
3
are provided a driving electrode
5
for driving the liquid crystal layer, an opposite electrode
6
and a TFT
4
. In the TFT
4
there are three electrodes. The scanning line
2
connected with the scanning line driving circuit shown in
FIG. 45
is connected with the gate electrode of the TFT
4
, so as to apply the scanning signal, the scanning line driving circuit outputs, upon the gate electrode of the TFT
4
.
The signal line
3
connected with the signal line driving circuit is connected with the source electrode
15
of the TFT
4
to transmit the image signal the signal line driving circuit outputs. The drain electrode
16
of the TFT
4
is connected with the driving electrode
5
through a contact hole
14
as shown in
FIG. 43
a.
In the same pixel, an opposite electrode
6
is provided to be engaged face to face with the driving electrode
5
. The opposite electrode
6
is connected with the common line
8
. The common line
8
is connected with each opposite electrode
6
provided in each pixel on the TFT array substrate
20
.
The sectional construction of the picture section will be described in accordance with
FIG. 43
b.
A driving electrode
5
and an opposite electrode
6
are respectively formed on the glass substrate
1
. Although not shown in
FIG. 43
b,
the scanning line
2
and the common line
8
are also formed in the same layer as that of the driving electrode
5
and the opposite electrode
6
. The gate insulating film
9
is laminated on a glass substrate by covering the driving electrode, the opposite electrode, the scanning line and the common line, and the signal line
3
is formed on the gate insulating film
9
. Although not shown in
FIG. 43
b,
the storage capacitance forming electrode
7
is also formed in the same layer as that of the signal line
3
. A passivation film
10
′ is laminated further on the signal line
3
, so as to form the TFT array substrate
20
. The TFT array substrate
20
and the opposite substrate
30
is superposed. The IPS liquid crystal displaying apparatus is made with a liquid crystal
11
being sealed between the TFT array substrate
20
and the opposite substrate
30
.
The IPS liquid crystal displaying apparatus is a system where the electric filed is caused along the surface of the TFT array substrate
20
between the driving electrode
5
and the opposite electrode
6
provided on the TFT array substrate
20
. Thus, the opposite substrate
30
is a no-electrode substrate having no electrode. On the opposite substrate
30
there is provided a BM
12
which is a light shielding film. Although not shown, the light leaked from a slit
40
of
FIG. 43
a
is to be shielded with a back light, provided on the under side of the TFT array substrate, as a light source in
FIG. 43
b.
An area surrounded by broken lines shown by
50
, defining an opening per pixel, functions as a role of a window through which light passes with the back light as a light source. But the light from the back light is shielded by a driving electrode
5
, an opposite electrode
6
, a black matrix
12
and so on, thereby influencing upon the picture quality of the liquid crystal display. Thus, a problem is to reduce the ratio, in area, of the driving electrode
5
, the opposite electrode
6
, the black matrix
12
and so on to be occupied in the area of the opening
50
.
The above description is given about the construction of the pixel of the conventional IPS liquid crystal displaying apparatus about
FIGS. 43
a
and
43
b,
FIG.
44
and FIG.
45
. The operation of the IPS liquid crystal displaying apparatus will be described. The gate electrode is provided in each pixel. The gate ele
Kobayashi Kazuhiro
Masutani Yuichi
Nakashima Ken
Niwano Yasunori
Oodoi Yuuzou
Mitsubishi Denki & Kabushiki Kaisha
Ngo Julie
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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