In line testing device for a circuit calculating the discrete Fo

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364737, G06F 734, G06F 1535, G06F 1100

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active

047605499

ABSTRACT:
An in line testing device for a circuit calculating discrete Fourier transform as well as a circuit including such a device. The device has a processor for calculating the discrete Fourier transform and a processor effecting in line checking of the calculation of the discrete Fourier transform. The check uses Parseval's theorem: ##EQU1##

REFERENCES:
patent: 3884546 (1975-05-01), Chu
patent: 3998496 (1976-12-01), Bernab' et al.
patent: 4158888 (1979-06-01), Shapiro et al.
patent: 4334273 (1982-06-01), Ikeda
patent: 4408284 (1983-10-01), Kijesky et al.
patent: 4479188 (1984-10-01), de Keijzer
patent: 4547862 (1985-10-01), McIver et al.
A. Lord, "Signal Processing Using F.F.T. Techniques", New Electronics, vol. 16, No. 8, Apr. 1983, pp. 52-53.

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