In-line piece-wise linear desynchronizer

Pulse or digital communications – Spread spectrum – Direct sequence

Patent

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Details

370102, 3701053, H04L 700

Patent

active

052009823

ABSTRACT:
An in-line piece-wise linear desynchronizer eliminates the need for very low bandwidth analog, phase lock loops to smooth phase jumps caused by pointer changes such as those associated with a DS-1 signal mapped into a SONET VT 1.5 payload. The desynchronizer comprises a digital elastic store position detection circuit, a digital frame induced jitter filter, a digital leak rate filter, and a digital frequency synthesizer (VCO). The magnitude of the jitter can be reduced to any level by adjusting the digital VCO resolution and digital leak rate filter time constant. The desynchronizer produces a digitally synthesized output clock which can then be coupled to an analog/digital phase lock loop for smoothing high frequency jitter in the synthesized output clock, thereby providing an in-line interface function.

REFERENCES:
patent: 4965794 (1990-10-01), Smith
patent: 4996698 (1991-02-01), Nelson
patent: 5014271 (1991-05-01), Fujimoto et al.
patent: 5052025 (1991-09-01), Duff et al.
patent: 5131013 (1992-07-01), Choi
Design & Performance Verification of a Sonet-to-DS 3 Desynchronizer by Robert W. Hamlin, Jr. Transwitch Corp. 8 Progress Drive, Shelton, Conn. 06484 Date unknown but prior to Jan. 27, 1992.

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