In a memory emulation test apparatus, a method of and system for

Details In a memory emulation test apparatus, a method of and system for In a memory emulation test apparatus, a method of and system for

1991-10-04

1994-06-28

Canney, Vincent P.

Excavating

371 161, G06F 1100

Patent

active

053253655

ABSTRACT:
A memory emulation test system is provided with a method of and system for fast functional testing of memories, such as boot ROMs, in microprocessor-based assemblies. The emulative test system includes a synchronization circuit which automatically re-arms itself and generates sync pulses on each and every UUT data access cycle to allow the UUT microprocessor to read every boot ROM memory location and collect data to be computed into a checksum or other signature to be compared with a predetermined signature representative of a correctly functioning and faultless boot ROM.

REFERENCES:
patent: 4868822 (1989-09-01), Scott et al.
patent: 4873705 (1989-10-01), Johnson
patent: 4989207 (1991-01-01), Polstra
patent: 4993027 (1991-02-01), McGraw et al.
patent: 5068852 (1991-11-01), Locke
patent: 5136590 (1992-08-01), Polstra et al.

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