In a data processor a method and apparatus for performing a floa

Details In a data processor a method and apparatus for performing a floa In a data processor a method and apparatus for performing a floa

1992-09-04

1994-10-18

Wambach, Margaret Rose

Communications: electrical

Digital comparator systems

307355, 364748, 364769, G06F 7012, H03K 522

Patent

active

053572378

ABSTRACT:
A data processor (10) has a floating-point execution unit (32) for executing a floating-point compare operation using two data operands. The execution unit (32) uses mantissa comparator logic (107) to perform a bit-wise comparison of a mantissa portion of a first operand with the mantissa portion of a second operand, and to provide a mantissa comparison result. Similarly, exponent comparator logic (122) performs a bit-wise comparison of an exponent portion of the first operand with the exponent portion of the second, and provides an exponent comparison result. Comparator logic (114) in the execution unit receives the mantissa comparison result and the exponent comparison result. If the exponent portions of the two operands are not equal, the comparator logic (114) uses an operand sign bit of each operand and the exponent comparison result to order the two operands. If the exponent portions of the two operands are equal, the comparator logic uses the operand sign bit of each operand and the mantissa comparison result to order the two operands.

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Les Kohn, et al., "Introducing the Intel i860 64-Bit Microprocessor," IEEE MICRO Aug. 1989, pp. 15-30.

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