Patent
1974-11-07
1976-06-01
Mullins, James B.
357 36, 357 40, 357 48, H01L 2948, H01L 2956
Patent
active
039613518
ABSTRACT:
An integrated circuit arrangement having at least one pair of superposed transistor structures which provides very high packing density and low power consumption. The arrangement includes first, second and third superposed semiconductive layers, the second layer being interposed between, and of the opposite conductivity type to, the first and third layers, and having a doping density higher than the first layer but lower than the third layer. At least one electrical contact is formed on a surface of the first layer and a plurality of spaced-apart semiconductive regions of the same conductivity type as the second layer are formed in the said surface of the first layer. An electrical contact is provided for each of the semiconductive regions and a layer of an electrical contact material is formed on a surface of the third layer. The doping density of the first layer can be such that the said at least one electrical contact forms a Schottky diode with the first layer.
REFERENCES:
patent: 3585412 (1971-06-01), Hodges et al.
patent: 3623925 (1971-11-01), Jenkins et al.
patent: 3823353 (1974-07-01), Berger et al.
wiedmann, "Injection-Coupled Memory: A High Density Static Bipolar Memory," IEEE Journal Of Solid-State Circuits, Oct. 1973 vol. SC-8, No. 5 pp. 332-337.
Mullins James B.
Plessey Handel und Investments A.G.
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