Improved superconductor/semiconductor junction structures

Details Improved superconductor/semiconductor junction structures Improved superconductor/semiconductor junction structures

1982-11-29

1985-01-22

James, Andrew J.

357 4, 357 15, H01L 2712

Patent

active

044955103

ABSTRACT:
The specification discloses a process for forming a superconductor/semiconductor junction structure having optimized low-temperature current transport properties by first providing a substrate of a chosen semiconductor material having an atomically clean surface. A layer of a first chosen superconducting material is deposited on or above the surface of the substrate to a predetermined thickness. Either before or after the formation of this layer of the first superconducting material, a region of a second chosen superconducting material is formed between the surface of the substrate and the layer of the first superconducting material to serve as an interfacial reaction barrier to prevent the reaction between the surface of the substrate and the first chosen superconducting material at the interface thereof which would otherwise result in the formation of an undesired non-superconducting material at the interface. By preventing this undesired interfacial reaction, an optimized low-temperature current transport path is maintained across the interface and certain device performance characteristics can be optimized. Josephson junction superconducting devices and super-Schottky devices may be formed by this disclosed process.

REFERENCES:
patent: 3751721 (1973-08-01), Fulton
patent: 3781310 (1973-09-01), Preobrazhentsev et al.
patent: 3794516 (1974-02-01), Engeler et al.
patent: 3984261 (1976-10-01), Hawrylo
patent: 4090851 (1978-05-01), Berkman et al.
patent: 4145699 (1979-03-01), Hu et al.
patent: 4220959 (1980-09-01), Kroger
Roth et al., "Super-Schottky and Josephson Effect Devices Using Niobium on Thin Silicon Membranes," Am. Inst. of Physics, vol. 44, 1978, pp. 384-388.
Sugiyama et al., "Nb/GaAs Super-Schottky Diode," IEEE Electron Device Letters, vol. EDL-1, No. 11, Nov. 1980, pp. 236-238.

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