Improved data comparator for comparing plural-bit data at higher

Details Improved data comparator for comparing plural-bit data at higher Improved data comparator for comparing plural-bit data at higher

1991-01-22

1992-07-14

Mai, Tan V.

Communications: electrical

Digital comparator systems

G06F 702

Patent

active

051306921

ABSTRACT:
An improved data comparison circuit for comparing two pieces of data having 12 bits is disclosed. In the data comparison circuit, cell circuits compare two pieces of data for every corresponding 4 bits. When a match is detected in the comparison of a set of 4 bits, a signal representative of the comparison result of the lower-order bits is bypassed. That is, by bypassing a signal representative of the comparison result of the lower order bits through the cell circuit in which the match is detected, the delay of signal propagation which may occur in the cell circuit in which the match is detected can be prevented.

REFERENCES:
patent: 4225849 (1980-09-01), Lai
"A 32-bit CMOS Microprocessor with On-Chip Cache and TLB", IEEE Journal of Solid-State Circuits, vol. SC-22, No. 5, pp. 800-807, Oct. 1987.
Introduction to VLSI Systems, pp. 26-29, 1981.

Affiliated with

Also associated with

Rating

Improved data comparator for comparing plural-bit data at higher does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Improved data comparator for comparing plural-bit data at higher, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Improved data comparator for comparing plural-bit data at higher will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-337709