Implementing tamper evident and resistant detection through...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257SE23071, C257SE27016, C257SE51008

Reexamination Certificate

active

07989918

ABSTRACT:
A method and tamper detection circuit for implementing tamper and anti-reverse engineering evident detection in a semiconductor chip, and a design structure on which the subject circuit resides are provided. A capacitor is formed with the semiconductor chip including the circuitry to be protected. A change in the capacitor value results responsive to the semiconductor chip being thinned, which is detected and a tamper-detected signal is generated.

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patent: 6800933 (2004-10-01), Mathews et al.
patent: 7157372 (2007-01-01), Trezza
patent: 2006/0278995 (2006-12-01), Trezza
patent: 2006/0286775 (2006-12-01), Singh et al.
patent: 2007/0007595 (2007-01-01), Hirano et al.
patent: 2009/0085217 (2009-04-01), Knickerbocker et al.
U.S. Appl. No. 112/186,837 filed Aug. 6, 2008 by Gerald Keith Bartley et al., entitled “Implementing Decoupling Capacitors With Hot-Spot Thermal Reduction on Integrated Circuit Chips”.

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