Implementing scatter/gather operations in a direct memory access

Details Implementing scatter/gather operations in a direct memory access Implementing scatter/gather operations in a direct memory access

1997-01-27

1998-01-13

Chan, Eddie P.

395310, G06F 1310

Patent

active

057088497

ABSTRACT:
A direct memory access (DMA) circuit includes a first register for storing an address for the transfer of data, apparatus for transferring data at sequential addresses beginning at the address in the first register until all data at sequential addresses has been transferred, a second register for storing a beginning address for a list of addresses, and a state machine which responds to the completion of a transfer of data at sequential addresses beginning at the address in the first register and an indication that more data is to be transferred to transfer an address from the list at the address in the second register to the first register and causes the apparatus for transferring data to commence.

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