Implementation of the HDLC CRC calculation

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371 377, 371 379, G06F 1110

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053253728

ABSTRACT:
In accordance with the present invention, a multi-bit CRC character is created by generating a most significant bit (MSB) portion and a least significant bit (LSB) portion in parallel and then combining the MSB and LSB portions to provide the CRC character. This is accomplished by first XORing a multi-bit input character and a current multi-bit CRC high value character stored in a CRC high value latch. The result of this initial XOR operation serves as the input to a high value look-up table which maps the input to a corresponding high value look-up table output character. The value look-up table output character is XORed with a current multi-bit CRC low value character stored in a CRC low value latch to generate an updated CRC high value character. In parallel with the generation of the updated CRC high value character, the result of the initial XOR operation is also provided as the input to a low value look-up table which maps the input to a corresponding updated CRC low value character. The updated CRC high and low value characters are combined to respectively provide the MSB and LSB portions of the CRC character. Both the high value latch and the low value latch are iteratively updated utilizing the updated CRC high and low value characters, respectively. The above-described operation is, thus, performed repetitively on an iteratively updated input character.

REFERENCES:
patent: 4030067 (1977-06-01), Howell et al.
patent: 4703485 (1987-10-01), Patel
patent: 5027357 (1991-06-01), Yu et al.
patent: 5103451 (1992-04-01), Fossey
patent: 5132975 (1992-07-01), Avaneas
Dilip V. Sarwate, Computation of Cyclic Redundancy Checks via Table Look-Up, Communications of the ACM, vol. 31, No. 8, Aug. 1988, pp. 1008-1013.
Gary S. Brown, "Demonstration Program to Compute the 32-bit CRC used as the Frame Check Sequence in ADCCP", 1986, pp. 1-3.
Thom Henderson et al, "ARCSVC.C 1.1", 1985, pp. 1-3.
Thom Henderson, "ARCSVC Version 2.20", 1986, pp. 1-2.
Brown et al., "CRC Calculation Stuff", 1986, pp. 1-3.
Perez et al.; Byte-Wise CRC Calculations; IEEE Micro; vol. 3, No. 3, 1983 pp. 40-50.
Method to Provide Software Calculation of a 32-Bit Frame Check Sequence, a Byte at a Time; IBM Technical Disclosure Bulletin; vol. 30, No. 12, Aug. 1988; pp. 458-464.

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